User Manual

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Table Of Contents

Introduction
Features
Table of Contents
1. Ordering Information and Module Marking
2. Block Diagram
3. Pinout and Package Information
- 3.1. Package Description
4. Electrical Characteristics
- 4.1. Absolute Maximum Ratings
- 4.2. Recommended Operating Conditions
- 4.3. DC Characteristics
- 4.4. IEEE 802.11 b/g/n Radio Performance
  - 4.4.1. Receiver Performance
  - 4.4.2. Transmitter Performance
- 4.5. Bluetooth Radio Performance
  - 4.5.1. Receiver Performance
  - 4.5.2. Transmitter Performance
- 4.6. Timing Characteristics
5. Power Management
- 5.1. Device States
- 5.2. Controlling Device States
- 5.3. Power-Up/Down Sequence
- 5.4. Digital I/O Pin Behavior During Power-Up Sequences
6. Clocking
- 6.1. Low-Power Clock
7. CPU and Memory Subsystem
- 7.1. Processor
- 7.2. Memory Subsystem
- 7.3. Nonvolatile Memory
8. WLAN Subsystem
- 8.1. MAC
- 8.2. PHY
- 8.3. Radio
9. Bluetooth Low Energy 4.0
10. External Interfaces
- 10.1. Interfacing with the Host Microcontroller
- 10.2. SPI Interface
  - 10.2.1. Overview
  - 10.2.2. SPI Timing
- 10.3. UART Interface
11. Application Reference Design
- 11.1. Host Interface - SPI
12. Module Outline Drawings
13. Design Consideration
- 13.1. Module Placement and Routing Guidelines
- 13.2. Antenna Performance
14. Reflow Profile Information
- 14.1. Storage Condition
  - 14.1.1. Moisture Barrier Bag Before Opening
  - 14.1.2. Moisture Barrier Bag Open
- 14.2. Solder Paste
- 14.3. Stencil Design
- 14.4. Baking Conditions
- 14.5. Soldering and Reflow Condition
  - 14.5.1. Reflow Oven
15. Module Assembly Considerations
16. Regulatory Approval
- 16.1. United States
- 16.2. Canada
- 16.3. Europe
- 16.4. Other Regulatory Information
17. Reference Documentation
18. Document Revision History
The Microchip Web Site
Customer Change Notification Service
Customer Support
Product Identification System
Microchip Devices Code Protection Feature
Legal Notice
Trademarks
Quality Management System Certified by DNV
Worldwide Sales and Service

10. External Interfaces

10.1 Interfacing with the Host Microcontroller

This section describes about interfacing the ATWINC3400-MR210CA module with the host

microcontroller. The interface comprises of a slave SPI and additional control signals, as shown in the

following figure. For more information on SPI interface specification and timing, refer SPI Interface.

Additional control signals are connected to the GPIO/IRQ interface of the microcontroller.

Figure 10-1. Interfacing with Host Microcontroller

Host

Microcontroller

CHIP_EN

RESET

WAKE

IRQN

SPI

Wi-Fi Controller

Module

Table 10-1. Host Microcontroller Interface Pins

Pin Number Function

4 RESET_N

11 WAKE

13 IRQ_N

22 CHIP_EN

16 SPI_SSN

15 SPI_MOSI

17 SPI_MISO

18 SPI_SCK