User Manual

Figure 4-3. SPI Slave Timing Diagram
The following table provides the SPI Slave timing parameters for the ATWINC3400-MR210CA module.
Table 4-9. SPI Slave Timing Parameters
(1)
Parameter Symbol Min. Max. Unit
Clock Input Frequency
(2)
f
SCK
- 48 MHz
Clock Low Pulse Width t
WL
6 - ns
Clock High Pulse Width t
WH
4 -
Clock Rise Time t
LH
0 7
Clock Fall Time t
HL
0 7
TXD Output Delay
(3)
t
ODLY
3 9 from SCK fall
11 from SCK rise
RXD Input Setup Time t
ISU
3 -
RXD Input Hold Time t
IHD
5 -
ATWINC3400-MR210CA
© 2017 Microchip Technology Inc.
Draft Datasheet Preliminary
DS00000000A-page 18