User Manual
Table Of Contents
- Introduction
- Features
- Table of Contents
- 1. Ordering Information and Module Marking
- 2. Block Diagram
- 3. Pinout and Package Information
- 4. Electrical Characteristics
- 5. Power Management
- 6. Clocking
- 7. CPU and Memory Subsystem
- 8. WLAN Subsystem
- 9. Bluetooth Low Energy 4.0
- 10. External Interfaces
- 11. Application Reference Design
- 12. Module Outline Drawings
- 13. Design Consideration
- 14. Reflow Profile Information
- 15. Module Assembly Considerations
- 16. Regulatory Approval
- 17. Reference Documentation
- 18. Document Revision History
- The Microchip Web Site
- Customer Change Notification Service
- Customer Support
- Product Identification System
- Microchip Devices Code Protection Feature
- Legal Notice
- Trademarks
- Quality Management System Certified by DNV
- Worldwide Sales and Service
Pin # Pin Name Pin Type Description
31 GPIO19 Digital I/O,
Programmable pull up
General Purpose Input/Output pin.
32 GPIO20 Digital I/O,
Programmable pull up
General Purpose Input/Output pin.
33 IRQN Digital output,
Programmable pull up
• ATWINC3400-MR210CA module host
interrupt request output pin.
• This pin must connect to a host interrupt
pin.
34 I2C_SCL_M Digital I/O,
Programmable pull up
I2C Master clock pin.
35 I2C_SDA_M Digital I/O,
Programmable pull up
I2C Master data pin.
36 GND GND Ground pin.
37 PADDLE VSS Power Connect to system board ground.
3.1 Package Description
The following table provides the ATWINC3400-MR210CA module package dimensions.
Table 3-2. ATWINC3400-MR210CA Module Package Information
Parameter Value Unit
Pad count 36 -
Package size 22.43 x 14.73 mm
Total thickness 2.09
Pad pitch 1.20
Pad width 0.81
Exposed pad size 4.4 x 4.4
ATWINC3400-MR210CA
© 2017 Microchip Technology Inc.
Draft Datasheet Preliminary
DS00000000A-page 10