Datasheet

High-Speed Inter-Chip (HSIC) USB 2.0 Hub and Flash Media Controller

Datasheet

Revision 1.3 (03-13-13) 48 SMSC USB4640/USB4640i

DATASHEET

Note: All power supplies must have reached the operating levels mandated in Chapter 6 on page 51,

prior to (or coincident with) the assertion of

nRESET.

4.5.2 USB Bus Reset

In response to the upstream port signaling a reset to the device, the device does the following:

1. Sets default address to 0

2. Sets configuration to: Unconfigured

3. Negates

PRTCTL[3:2] to all downstream ports

4. Clears all TT buffers

5. Moves device from suspended to active (if suspended)

6. Complies with Section 11.10 of the

USB 2.0 Specification for behavior after completion of the reset

sequence

Note: The device does not propagate the upstream USB reset to downstream devices.

The host then configures the device and the device’s downstream port devices in accordance with the

USB 2.0 Specification.

Table 4.7 nRESET Timing for EEPROM Mode

NAME DESCRIPTION MIN TYP MAX UNITS

nRESET asserted 1 μsec

t2 Device recovery/stabilization 500

μsec

t3 8051 programs device configuration 20 50 msec

t4 USB attach (Note) 100 msec

t5 Host acknowledges attach and signals USB reset 100 msec

t6 USB idle Undefined msec

t7 Completion time for requests (with or without data

stage)

5msec