Datasheet

ManualsBrandsMICROCHIP TECHNOLOGY ManualsInterface ICsInterface IC - customised QFN 48

SMSC USB4640/USB4640i Revision 1.3 (03-13-13)

DATASHEET

PRODUCT FEATURES

Datasheet

USB4640/USB4640i

High-Speed Inter-Chip (HSIC) USB 2.0 Hub

and Flash Media Controller

General Description

The SMSC USB4640/USB4640i is a Hi-Speed HSIC USB

hub and card reader combo solution with an upstream port

that is compliant to HSIC 1.0 (supplement to the USB 2.0

Specification). The two downstream ports are compliant with

the USB 2.0 Specification.

High-Speed Inter-Chip (HSIC) is a digital interconnect bus

that enables the use of USB technology as a low-power chip-

to-chip interconnect at speeds up to 480 Mb/s. The HSIC

interface is an industry standard 2-pin digital interface which

uses standard USB software. The USB4640/USB4640i

provides an ultra fast interface between an HSIC enabled

host and several popular flash media formats. The controller

allows read/write capability to flash media from the following

families:

— Secure Digital

(SD)

— MultiMediaCard

(MMC)

—Memory Stick

(MS)

— xD-Picture Card

(xD)

The USB4640/USB4640i combo solution leverages SMSC’s

innovative technology that delivers industry-leading data

throughput in mixed-speed USB environments. Average

sustained transfer rates exceeding 35 MB/s are possible

Highlights

 Upstream HSIC port and 2 exposed Hi-Speed USB 2.0

downstream ports for external peripheral expansion

 Dedicated flash media reader internally attached to a 3rd

downstream port of the hub as a USB compound device

— single or multiplexed flash media reader interface

 PortMap

— Flexible port mapping and disable sequencing

 PortSwap

— Programmable USB differential-pair pin locations ease PCB

design by aligning USB signal lines directly to connectors

 PHYBoost

— Programmable USB signal drive strength for recovering

signal integrity using 4-level driving strength resolution

Features

 Compliance with the following flash media card

specifications SD 2.0; MMC 4.2; MS 1.43; MS-Pro 1.02;

MS-Pro-HG 1.01; MS-Duo 1.10; and xD 1.2

 Low-power digital HSIC interface offers a replacement for

onboard host and device connection for analog USB bus

cable

 HSIC interface enables printers, mobile PCs, ultra-mobile

PCs, and cell phone products to reduce the total power

budget

 HSIC interface provides use of USB connectivity and

compatibility with existing USB drivers and software

 External 1.2 V reference allows upstream/downstream

HSIC links to use the same voltage reference

 Supports a single external 3.3 V supply source; internal

regulators provide 1.8 V internal core voltage for additional

bill of materials and power savings

 The hub transaction translator (TT) supports Full-Speed

and Low-Speed peripheral operation

 9 KB RAM | 64 KB on-chip ROM

 Enhanced EMI rejection and ESD protection performance

 Hub and flash media reader/writer configuration from a

single source:

— Configures internal code using an external I

C EEPROM

— Supports external code using an SPI Flash EEPROM

— Customizable vendor ID, product ID, and language ID if using

an external EEPROM

 Up to 9 configurable GPIOs for special functions

 The USB4640 supports the commercial temperature range

of 0°C to +70°C

 The USB4640i supports the industrial temperature range

of -40°C to +85°C

 48-pin QFN (7 x 7 mm) lead-free, RoHS compliant

package

Applications

 3G/4G handsets, smartphones, cell phones, and other

mobile devices

 Desktop and mobile PCs

 Printers

 GPS navigation systems

 Media players/viewers

 Consumer A/V

 Set-top boxes

 Industrial products

1. Obtain user license from the xD-Picture Card License

Office.

2. Host and media dependent.

Summary of content (62 pages)

PAGE 1
USB4640/USB4640i High-Speed Inter-Chip (HSIC) USB 2.0 Hub and Flash Media Controller PRODUCT FEATURES Datasheet General Description Features The SMSC USB4640/USB4640i is a Hi-Speed HSIC USB hub and card reader combo solution with an upstream port that is compliant to HSIC 1.0 (supplement to the USB 2.0 Specification). The two downstream ports are compliant with the USB 2.0 Specification.
PAGE 2
High-Speed Inter-Chip (HSIC) USB 2.0 Hub and Flash Media Controller Datasheet Order Number(s): USB4640/USB4640i-HZH-xx for 48-pin, QFN lead-free RoHS compliant package USB4640/USB4640i-HZH-TR-xx for 48-pin, QFN lead-free RoHS compliant tape and reel package “XX” in the order number indicates the internal ROM firmware revision level. Please contact SMSC for more information.
PAGE 3
High-Speed Inter-Chip (HSIC) USB 2.0 Hub and Flash Media Controller Datasheet Conventions Within this manual, the following abbreviations and symbols are used to improve readability. Example BIT FIELD.
PAGE 4
High-Speed Inter-Chip (HSIC) USB 2.0 Hub and Flash Media Controller Datasheet Table of Contents Chapter 1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 1.1 1.2 1.3 Hardware Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Software Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PAGE 5
High-Speed Inter-Chip (HSIC) USB 2.0 Hub and Flash Media Controller Datasheet Chapter 8 Package Specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 8.1 Tape and Reel Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59 SMSC USB4640/USB4640i 5 DATASHEET Revision 1.
PAGE 6
High-Speed Inter-Chip (HSIC) USB 2.0 Hub and Flash Media Controller Datasheet List of Tables Table 3.1 Table 3.2 Table 3.3 Table 3.4 Table 3.5 Table 4.1 Table 4.2 Table 4.3 Table 4.4 Table 4.5 Table 4.6 Table 4.7 Table 5.1 Table 6.1 Table 7.1 USB4640/USB4640i 48-Pin List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . USB4640/USB4640i Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PAGE 7
High-Speed Inter-Chip (HSIC) USB 2.0 Hub and Flash Media Controller Datasheet List of Figures Figure 2.1 Figure 3.1 Figure 3.2 Figure 3.3 Figure 3.4 Figure 3.5 Figure 3.6 Figure 3.7 Figure 4.1 Figure 5.1 Figure 5.2 Figure 5.3 Figure 6.1 Figure 8.1 Figure 8.2 Figure 8.3 USB4640/USB4640i Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . USB4640/USB4640i 48-Pin QFN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PAGE 8
High-Speed Inter-Chip (HSIC) USB 2.0 Hub and Flash Media Controller Datasheet Chapter 1 Overview The USB4640/USB4640i is a Hi-Speed HSIC USB hub and card reader combo solution with an upstream port compliant to the High-Speed Inter-Chip USB Electrical Specification Revision 1.0 [2]. The two downstream ports are USB 2.0 compliant, and the dedicated flash media reader/writer is internally attached to a 3rd downstream port as a USB compound device.
PAGE 9
High-Speed Inter-Chip (HSIC) USB 2.0 Hub and Flash Media Controller Datasheet 1.2  Compliance with the following flash media card specifications: —Secure Digital 2.0 and MultiMediaCard 4.2 –SD 2.0, SD-HS, SD-HC –TransFlash™ and reduced form factor media –1/4/8 bit MMC 4.2 —Memory Stick 1.43 —Memory Stick Pro Format 1.02 —Memory Stick Pro-HG Duo Format 1.01 –Memory Stick, MS Duo, MS-HS, MS Pro-HG, MS Pro —Memory Stick Duo 1.10 –xD-Picture Card 1.
PAGE 10
Revision 1.3 (03-13-13) 3.3 V DATASHEET 10 USB Data Downstream PHY PLL 24 MHz Crystal Transaction Translator Serial Interface Engine 1.8 V Reg 3.3 V 1.8 V USB Data OC Sense/ Downstream Pwr Switch PHY Port #2 OC Sense Switch Driver Routing & Port Re-Ordering Logic Repeater HSIC HSIC Data & Strobe OC Sense/ Pwr Switch Port #3 OC Sense Switch Driver VDDCR 1.8 V Reg HSIC Impedance 1.
PAGE 11
High-Speed Inter-Chip (HSIC) USB 2.0 Hub and Flash Media Controller Datasheet Chapter 3 Pinning Information This chapter outlines the pinning configuration, followed by a corresponding pin list grouped by function. The detailed pin descriptions are listed then outlined in Section 3.3, on page 13.
PAGE 12
High-Speed Inter-Chip (HSIC) USB 2.0 Hub and Flash Media Controller Datasheet 3.2 48-Pin List Table 3.
PAGE 13
High-Speed Inter-Chip (HSIC) USB 2.0 Hub and Flash Media Controller Datasheet 3.3 Pin Descriptions This section provides a detailed description of each pin. The pins are arranged in functional groups according to their associated interface. The pin descriptions below are applied when using the internal default firmware and can be referenced in Chapter 4: Configuration Options on page 25. See Appendix A: (Acronyms) on page 61 for details.
PAGE 14
High-Speed Inter-Chip (HSIC) USB 2.0 Hub and Flash Media Controller Datasheet Table 3.2 USB4640/USB4640i Pin Descriptions (continued) SYMBOL 48-PIN QFN BUFFER TYPE XTAL2 44 OCLKx DESCRIPTION 24 MHz Crystal Output The other terminal of the crystal, or it is left open when an external clock source is used to drive XTAL1(CLKIN).
PAGE 15
High-Speed Inter-Chip (HSIC) USB 2.0 Hub and Flash Media Controller Datasheet Table 3.2 USB4640/USB4640i Pin Descriptions (continued) SYMBOL MS_D[7:0] 48-PIN QFN BUFFER TYPE 20 19 17 18 32 30 23 24 I/O8PD DESCRIPTION Memory Stick System Data In/Out Bi-directional data signals for the MS device. In serial mode, the most significant bit (MSB) of each byte is transmitted first by either the memory stick controller MSC or the MS device on MS_D0. MS_D0, MS_D2, and MS_D3 have weak pull-down resistors.
PAGE 16
High-Speed Inter-Chip (HSIC) USB 2.0 Hub and Flash Media Controller Datasheet Table 3.2 USB4640/USB4640i Pin Descriptions (continued) SYMBOL 48-PIN QFN BUFFER TYPE xD_nRE 27 O8PU DESCRIPTION xD-Picture Card Read Enable Active low read strobe signal for the xD-Picture Card device. When using the internal FET, this pin has a weak internal pull-up resistor that is tied to the output of the internal power FET.
PAGE 17
High-Speed Inter-Chip (HSIC) USB 2.0 Hub and Flash Media Controller Datasheet Table 3.2 USB4640/USB4640i Pin Descriptions (continued) SYMBOL 48-PIN QFN BUFFER TYPE SPI_DO/ 10 I/O12 DESCRIPTION SPI Serial Data Out The output for the SPI port. See Section 3.6: ROM BOOT Sequence for diagram and usage instructions. GPIO5/ I/O6 SDA/ This pin may be used either as an input; edge sensitive interrupt input; or output. Custom firmware is required to activate this function.
PAGE 18
High-Speed Inter-Chip (HSIC) USB 2.0 Hub and Flash Media Controller Datasheet Table 3.2 USB4640/USB4640i Pin Descriptions (continued) SYMBOL 48-PIN QFN BUFFER TYPE nRESET 38 IS DESCRIPTION Reset Input The system uses this active low signal to reset the chip. The active low pulse should be at least 1 μs wide. TEST 40 I Test Input Tie to ground for normal operation. DIGITAL / POWER / GROUND CRFILT 15 VDD Core Regulator Filter Capacitor Requires a 1.0 μF (or greater) ± 20% (ESR <0.
PAGE 19
High-Speed Inter-Chip (HSIC) USB 2.0 Hub and Flash Media Controller Datasheet Table 3.
PAGE 20
High-Speed Inter-Chip (HSIC) USB 2.0 Hub and Flash Media Controller Datasheet 3.5 Port Power Control 3.5.1 Port Power Control Using a USB Power Switch The USB4640/USB4640i has a single port power control and over-current sense signal for each downstream port. When disabling port power, the driver will actively drive a 0. To avoid unnecessary power dissipation, the internal pull-up resistor will be disabled at that time.
PAGE 21
High-Speed Inter-Chip (HSIC) USB 2.0 Hub and Flash Media Controller Datasheet Schmitt trigger input will register this as a low resulting in an over-current detection. The open drain output does not interfere. 5V PRTCTL3 USB Device USB4640/40i 5V PRTCTL2 USB Device Figure 3.3 Port Power Control with a Single Poly Fuse and Multiple Loads When using a single poly fuse to power all devices, note that for the ganged situation, all power control pins must be tied together.
PAGE 22
High-Speed Inter-Chip (HSIC) USB 2.0 Hub and Flash Media Controller Datasheet The SPI_SPD_SEL pin is used to choose the speed of the SPI interface. During nRESET assertion, this pin will be tri-stated with the weak pull-down resistor enabled. When nRESET is negated, the value on the pin will be internally latched, and the pin will revert to SPI_DO functionality. The internal pulldown will be disabled. The firmware can determine the speed of operation on the SPI port by checking the SPI_CTL.
PAGE 23
High-Speed Inter-Chip (HSIC) USB 2.0 Hub and Flash Media Controller Datasheet Table 3.4 Legend for Pin Reset States Table SYMBOL DESCRIPTION 0 Output driven low 1 Output driven high IP Input enabled PU Hardware enables pull-up PD Hardware enables pull-down none Hardware disables pad -- Hardware disables function Z Hardware disables pad. Both output driver and input buffers are disabled. Table 3.
PAGE 24
High-Speed Inter-Chip (HSIC) USB 2.0 Hub and Flash Media Controller Datasheet Table 3.
PAGE 25
High-Speed Inter-Chip (HSIC) USB 2.0 Hub and Flash Media Controller Datasheet Chapter 4 Configuration Options 4.1 Hub SMSC’s USB 2.0 hub is fully compliant to the Universal Serial Bus Specification [1]. The hub provides 1 transaction translator (TT) that is shared by both downstream ports defined as a single-TT configuration. The TT contains 4 non-periodic buffers.
PAGE 26
High-Speed Inter-Chip (HSIC) USB 2.0 Hub and Flash Media Controller Datasheet 4.3.2 EEPROM Data Descriptor Table 4.
PAGE 27
High-Speed Inter-Chip (HSIC) USB 2.0 Hub and Flash Media Controller Datasheet Table 4.1 Internal Flash Media Controller Configurations (continued) ADDRESS REGISTER NAME DESCRIPTION INTERNAL DEFAULT VALUE A2h-A3h N/A A4h SM_PWR_LB Smart Media Device Power Lo byte 00h (Note 4.2) A5h SM_PWR_HB Smart Media Device Power Hi byte 0Ah (Note 4.
PAGE 28
High-Speed Inter-Chip (HSIC) USB 2.0 Hub and Flash Media Controller Datasheet Table 4.
PAGE 29
High-Speed Inter-Chip (HSIC) USB 2.0 Hub and Flash Media Controller Datasheet Table 4.4 Internal Flash Media Controller Extended Configurations (continued) ADDRESS REGISTER NAME DESCRIPTION INTERNAL DEFAULT VALUE 12Ah-145h N/A 00h 146h N/A 01h 147h - 14Bh N/A 01h, FFh, FFh, FFh, FFh 14Ch N/A 0Ah 14Dh-17Bh N/A 00h 17Ch-17Fh NVSTORE_SIG2 Non-Volatile Storage Signature 4.4.1 EEPROM Data Descriptor Register Descriptions 4.4.1.
PAGE 30
High-Speed Inter-Chip (HSIC) USB 2.0 Hub and Flash Media Controller Datasheet 4.4.1.6 1Eh: USB Language Identifier Descriptor Length BYTE NAME DESCRIPTION 0 USB_LANG_LEN USB language ID string descriptor length as defined by Section 9.6.7: String of the USB 2.0 Specification [1]. This field is the bLength, which describes the size of the string descriptor (in bytes). 4.4.1.
PAGE 31
High-Speed Inter-Chip (HSIC) USB 2.0 Hub and Flash Media Controller Datasheet 4.4.1.13 32h-5Dh: Reserved BYTE NAME 59:16 rsvd 4.4.1.14 DESCRIPTION 5Eh: USB Product String Descriptor Length BYTE NAME DESCRIPTION 0 USB_PRD_STR _LEN USB product string descriptor length as defined by Section 9.6.7 String of the USB 2.0 Specification [1]. This field is the bLength, which describes the size of the string descriptor (in bytes). 4.4.1.
PAGE 32
High-Speed Inter-Chip (HSIC) USB 2.0 Hub and Flash Media Controller Datasheet 4.4.1.18 9Bh: USB MaxPower (1 Byte) BIT NAME DESCRIPTION 7:0 USB_MAX_PWR USB Max Power per the USB 2.0 Specification [1]. Do NOT set this value greater than 100 mA. 4.4.1.
PAGE 33
High-Speed Inter-Chip (HSIC) USB 2.0 Hub and Flash Media Controller Datasheet BYTE BYTE NAME BIT 2 ATT_LHB 0 DESCRIPTION Attach on Card Insert/Detach on Card Removal 1 : attach on insert is enabled 0 : (default) - attach on insert is disabled 1 Always read as 0 2 Enable Device Power Configuration 1 : Custom Device Power Configuration stored in the NVSTORE is used 0 : (default) - Default Device Power Configuration is used 3 4.4.
PAGE 34
High-Speed Inter-Chip (HSIC) USB 2.0 Hub and Flash Media Controller Datasheet 4.4.2.3 FET 0 A4h-A5h: Smart Media Device Power Configuration NAME BITS SM_PWR_LB 1 2 SM_PWR_HB BIT TYPE DESCRIPTION 3:0 Low Nibble FET Lo Byte: 7:4 High Nibble 0000 : disabled 3:0 Low Nibble FET Hi Byte 0000 0001 1000 1010 3 7:4 4.4.2.
PAGE 35
High-Speed Inter-Chip (HSIC) USB 2.0 Hub and Flash Media Controller Datasheet 4.4.3 Device ID Strings These bytes are used to specify the LUN descriptor returned by the device. These bytes are used in combination with the device to LUN mapping bytes in applications where the LUNs need to be reordered and renamed. If multiple devices are mapped to the same LUN (a COMBO LUN), then the CLUN#_ID_STR will be used to name the COMBO LUN instead of the individual device strings.
PAGE 36
High-Speed Inter-Chip (HSIC) USB 2.0 Hub and Flash Media Controller Datasheet 4.4.3.7 D3h: Dynamic Number of LUNs BIT NAME DESCRIPTION 7:0 DYN_NUM_LUN These bytes are used to specify the number of LUNs the device exposes to the host. These bytes are also used for icon sharing by assigning more than one LUN to a single icon. This is used in applications where the device utilizes a combo socket with only a single icon displayed for one or more interfaces.
PAGE 37
High-Speed Inter-Chip (HSIC) USB 2.0 Hub and Flash Media Controller Datasheet 4.4.4.3 E0h: Product ID (LSB) BIT NAME DESCRIPTION 7:0 PID_LSB Least Significant Byte of the Product ID: a unique 16-bit value that identifies a particular product (vender assigned). 4.4.4.4 E1h: Product ID (MSB) BIT NAME DESCRIPTION 7:0 PID_MSB Most Significant Byte of the Product ID. a unique 16-bit value that identifies a particular product (vender assigned). 4.4.4.
PAGE 38
High-Speed Inter-Chip (HSIC) USB 2.0 Hub and Flash Media Controller Datasheet BIT NAME 2:1 CURRENT_SNS DESCRIPTION Over-Current Sense Selects current sensing on a port-by-port basis, all ports ganged, or none (only for bus-powered hubs). The ability to support current sensing on a per port or ganged basis is dependent upon the hardware implementation.
PAGE 39
High-Speed Inter-Chip (HSIC) USB 2.0 Hub and Flash Media Controller Datasheet 4.4.4.9 E6h: Configuration Data Byte 3 (CFG_DAT_BYT3) BIT NAME 7:4 rsvd 3 PRTMAP_EN DESCRIPTION Port Mapping Enable: selects the method used by the hub to assign port numbers and disable ports. 0 : Standard Mode.
PAGE 40
High-Speed Inter-Chip (HSIC) USB 2.0 Hub and Flash Media Controller Datasheet 4.4.4.11 E8h: Port Disable For Self-Powered Operation BIT BYTE NAME 7:0 PORT_DIS_SP DESCRIPTION Disables 1 or more ports. 0 : port is available 1 : port is disabled During self-powered operation this register selects the ports which will be permanently disabled. The ports are unavailable to be enabled or enumerated by a host controller.
PAGE 41
High-Speed Inter-Chip (HSIC) USB 2.0 Hub and Flash Media Controller Datasheet 4.4.4.14 EBh: Max Power For Bus-Powered Operation BIT BYTE NAME DESCRIPTION 7:0 MAX_PWR_BP Value in 2 mA increments that the hub consumes when operating as a buspowered hub. This value includes the hub silicon along with the combined power consumption of all associated circuitry on the board.
PAGE 42
High-Speed Inter-Chip (HSIC) USB 2.0 Hub and Flash Media Controller Datasheet 4.4.4.18 EFh: Boost_Up BIT NAME 7:2 rsvd 1:0 BOOST_IOUT DESCRIPTION USB electrical signaling drive strength boost bit for the upstream port A. 00 01 10 11 : : : : Normal electrical drive strength Elevated electrical drive strength Elevated electrical drive strength Elevated electrical drive strength Note: 4.4.4.19 Boost could result in non-USB compliant parameters.
PAGE 43
High-Speed Inter-Chip (HSIC) USB 2.0 Hub and Flash Media Controller Datasheet 4.4.4.20 F1h: Port Swap BIT BYTE NAME DESCRIPTION 7:0 PRT_SWP Port Swap: swaps the upstream and downstream USB DP and DM pins for ease of board routing to devices and connectors. 0 : USB D+ functionality is associated with the DP pin and D- functionality is associated with the DM pin. 1 : USB D+ functionality is associated with the DM pin and D- functionality is associated with the DP pin.
PAGE 44
High-Speed Inter-Chip (HSIC) USB 2.0 Hub and Flash Media Controller Datasheet 4.4.4.21 F2h: Port Map 12 BIT BYTE NAME DESCRIPTION 7:0 PRTM12 PortMap Register for Ports 1 and 2: when a hub is enumerated by a USB host controller, the hub is only permitted to report how many ports it has; the hub is not permitted to select a numerical range or assignment. The host controller will number the downstream ports of the hub starting with the number 1, up to the number of ports that the hub reports having.
PAGE 45
High-Speed Inter-Chip (HSIC) USB 2.0 Hub and Flash Media Controller Datasheet 4.4.4.22 F3h: Port Map 3 BIT BYTE NAME DESCRIPTION 7:0 PRTM3 PortMap Register for Ports 1 and 2: when a hub is enumerated by a USB host controller, the hub is only permitted to report how many ports it has; the hub is not permitted to select a numerical range or assignment. The host controller will number the downstream ports of the hub starting with the number 1, up to the number of ports that the hub reports having.
PAGE 46
High-Speed Inter-Chip (HSIC) USB 2.0 Hub and Flash Media Controller Datasheet 4.4.4.24 F7h-FBh: Not Applicable BIT BYTE NAME 7:0 N/A 4.4.4.25 DESCRIPTION FCh-FFh: Non-Volatile Storage Signature BYTE NAME DESCRIPTION 3:0 NVSTORE_SIG This signature is used to verify the validity of the data in the first 256 bytes of the configuration area. The signature must be set to ATA2 for USB4640/USB4640i. 4.4.
PAGE 47
High-Speed Inter-Chip (HSIC) USB 2.0 Hub and Flash Media Controller Datasheet 4.4.6.1 Protocol Implementation The hub will only access an EEPROM using the sequential read protocol as outlined in Chapter 8 of the MicroChip 24AA02/24LC02B Data Sheet [8]. 4.4.6.2 Pull-Up Resistor The circuit board designer is required to place external pull-up resistors (10 kΩ recommended) on the SPI_DO/GPIO5/SDA/SPI_SPD_SEL and SPI_CLK/GPIO4/SCL lines (per SMBus 1.
PAGE 48
High-Speed Inter-Chip (HSIC) USB 2.0 Hub and Flash Media Controller Datasheet Table 4.
PAGE 49
High-Speed Inter-Chip (HSIC) USB 2.0 Hub and Flash Media Controller Datasheet Chapter 5 AC Specifications 5.1 Oscillator/Crystal Parallel Resonant, Fundamental Mode, 24 MHz ± 350 ppm. Figure 5.1 Typical Crystal Circuit Table 5.
PAGE 50
High-Speed Inter-Chip (HSIC) USB 2.0 Hub and Flash Media Controller Datasheet 5.2 Ceramic Resonator 24 MHz ± 350 ppm Figure 5.3 Ceramic Resonator Usage with SMSC IC 5.3 External Clock 50% Duty cycle ± 10%, 24 MHz ± 350 ppm, Jitter < 100 ps rms. The external clock is recommended to conform to the signaling level designated in the JESD76-2 Specification on 1.8 V CMOS Logic. XTAL2 should be treated as a no connect. 5.3.1 I2C EEPROM Frequency is fixed at 58.6 kHz ± 20% 5.3.2 USB 2.
PAGE 51
High-Speed Inter-Chip (HSIC) USB 2.0 Hub and Flash Media Controller Datasheet Chapter 6 DC Parameters 6.1 Maximum Guaranteed Ratings PARAMETER SYMBOL Storage Temperature TSTOR MIN -55 MAX 150 UNITS COMMENTS °C Lead Temperature °C 1.2 V supply voltage VDD12 -0.5 1.5 V 3.3 V supply voltage VDD33 -0.5 4.0 V Voltage on USB+ and USB- pins -0.5 (3.3 V supply voltage + 2) ≤ 6 V Voltage on GPIO10 -0.5 VDD33 + 0.3 V Voltage on any signal pin -0.5 VDD33 + 0.
PAGE 52
High-Speed Inter-Chip (HSIC) USB 2.0 Hub and Flash Media Controller Datasheet 6.2 Operating Conditions PARAMETER SYMBOL MIN MAX UNITS Comments Commercial USB4640 Operating Temperature TA 0 70 °C Ambient temperature in still air. Industrial USB4640i Operating Temperature TA -40 85 °C Ambient temperature in still air. 1.2 V supply voltage VDD12 1.1 1.3 V The ripple on VDD12 must be less than 50 mV peak to peak. 1.
PAGE 53
High-Speed Inter-Chip (HSIC) USB 2.0 Hub and Flash Media Controller Datasheet 6.3 DC Electrical Characteristics PARAMETER SYMBO L MIN TYP MAX UNITS 0.8 V COMMENTS I, IPU, IPD Type Input Buffer Low Input Level VILI High Input Level VIHI Pull Down PD 72 μA Pull Up PU 58 μA 2.0 TLL Levels V IS Type Input Buffer Low Input Level VILI High Input Level VIHI Hysteresis 0.8 2.0 TTL Levels V 420 VHYSI V mV ICLK Input Buffer Low Input Level VILCK High Input Level VIHCK 1.
PAGE 54
High-Speed Inter-Chip (HSIC) USB 2.0 Hub and Flash Media Controller Datasheet PARAMETER SYMBO L MIN TYP MAX UNITS COMMENTS O8, O8PD, 08PU, I/O8, I/O8PD, and I/O8PU Type Buffers Low Output Level VOL High Output Level VOH VDD33 - 0.4 Output Leakage IOL -10 Pull Down PD 72 μA Pull Up PU 58 μA +10 V IOL = 8 mA @ VDD33 = 3.3 V V IOH = -8 mA @ VDD33 = 3.3 V μA VIN = 0 to VDD33 (Note 6.1) O12, I/O12, and I/O12PD Type Buffers 0.4 V IOL = 12 mA @ VDD33 = 3.
PAGE 55
High-Speed Inter-Chip (HSIC) USB 2.0 Hub and Flash Media Controller Datasheet SYMBO L MIN Output Current (Note 6.4) IOUT 200 Short Circuit Current Limit ISC On Resistance (Note 6.4) Output Voltage Rise Time PARAMETER TYP MAX UNITS COMMENTS mA VdropFET = 0.46 V 181 mA VoutFET = 0 V RDSON 2.1 Ω IFET = 70 mA tDSON 800 μs CLOAD = 10 μF Integrated Power FET Set to 200 mA Supply Current Unconfigured (Note 6.
PAGE 56
High-Speed Inter-Chip (HSIC) USB 2.0 Hub and Flash Media Controller Datasheet 6.4 Capacitance TA = 25°C; fc = 1 MHz; VDD33 = 3.3 V Table 6.1 Pin Capacitance LIMITS PARAMETER Clock Input Capacitance Input Capacitance Output Capacitance Revision 1.3 (03-13-13) SYMBOL MIN TYP MAX UNIT TEST CONDITION CXTAL 2 pF All pins (except USB pins and pins under test) are tied to AC ground.
PAGE 57
High-Speed Inter-Chip (HSIC) USB 2.0 Hub and Flash Media Controller Datasheet Chapter 7 GPIO Usage Table 7.
PAGE 58
High-Speed Inter-Chip (HSIC) USB 2.0 Hub and Flash Media Controller Datasheet Chapter 8 Package Specifications Figure 8.1 USB4640/USB4640i 48-Pin QFN Revision 1.
PAGE 59
High-Speed Inter-Chip (HSIC) USB 2.0 Hub and Flash Media Controller Datasheet 8.1 Tape and Reel Specifications Figure 8.2 48-Pin Package Tape Specifications SMSC USB4640/USB4640i 59 DATASHEET Revision 1.
PAGE 60
High-Speed Inter-Chip (HSIC) USB 2.0 Hub and Flash Media Controller Datasheet Figure 8.3 48-Pin Package Reel Specifications Revision 1.
PAGE 61
High-Speed Inter-Chip (HSIC) USB 2.
PAGE 62
High-Speed Inter-Chip (HSIC) USB 2.0 Hub and Flash Media Controller Datasheet Appendix B (References) [1] Universal Serial Bus Specification, Version 2.0, April 27, 2000 (12/7/2000 and 5/28/2002 Errata) USB Implementers Forum, Inc. http://www.usb.org [2] USB 2.0 Supplement High-Speed Inter-Chip USB Electrical Specification Revision 1.0. 09/23/07. USB Implementers Forum, Inc. http://www.usb.org/developers/docs/ [3] HSIC ECN. May 25, 2010 USB Implementers Forum, Inc. http://www.usb.