Datasheet

Highly Integrated Full Featured Hi-Speed USB 2.0 ULPI Transceiver
Datasheet
SMSC USB3320 73 Revision 1.0 (07-14-09)
DATASHEET
Chapter 8 Application Notes
8.1 Application Diagram
The USB3320 requires few external components as shown in the application diagrams. The USB 2.0
Specification restricts the voltage at the VBUS pin to a maximum value of 5.25V. In some applications,
the voltage will exceed this voltage, and the USB3320 provides an integrated overvoltage protection
circuit. The overvoltage protection circuit works with an external resistor (R
VBUS
) to lower the voltage
at the VBUS pin, as described in Section 5.6.2.6.
Following POR or hardware reset, the voltage at CLKOUT must not exceed V
IH_ED
as provided in
Table 4.4.
Table 8.1 Component Values in Application Diagrams
REFERENCE
DESIGNATOR VALUE DESCRIPTION NOTES
C
OUT
2.2μF Bypass capacitor to ground (<1Ω ESR)
for regulator stability.
Place as close as possible to the
transceiver.
C
VBUS
See Ta b le 8 . 2 Capacitor to ground required by the USB
Specification. SMSC recommends <1Ω
ESR.
Place near the USB connector.
C
BYP
System
dependent.
Bypass capacitor to ground. Typical
values used are 0.1 or 0.01 μF.
Place as close as possible to the
transceiver.
C
DC_LOAD
System
dependent.
The USB connector housing may be AC-
coupled to the device ground.
Industry convention is to ground
only the host side of the cable
shield.
R
VBUS
1kΩ or 10kΩ Series resistor to work with internal
overvoltage protection.
10kΩ in device applications.
See Tab le 5 . 7 for required values in Host
or OTG applications.
See Section 5.6.2.6 for
information regarding power
dissipation.
R
BIAS
8.06kΩ (±1%) Series resistor to establish reference
voltage.
See Section 5.3 for information
regarding power dissipation.
Table 8.2 Capacitance Values at VBUS of USB Connector
MODE MIN VALUE MAX VALUE
Host 120μF
Device 1μF10μF
OTG 1μF6.5μF