Datasheet

Highly Integrated Full Featured Hi-Speed USB 2.0 ULPI Transceiver
Datasheet
SMSC USB3320 11 Revision 1.0 (07-14-09)
DATASHEET
2NXT
Output,
CMOS
High The transceiver asserts NXT to throttle
the data. When the Link is sending data
to the transceiver, NXT indicates when
the current byte has been accepted by
the transceiver. The Link places the next
byte on the data bus in the following
clock cycle.
3 DATA[0]
I/O,
CMOS
N/A
ULPI bi-directional data bus.
4 DATA[1]
I/O,
CMOS
N/A
ULPI bi-directional data bus.
5 DATA[2]
I/O,
CMOS
N/A
ULPI bi-directional data bus.
6 DATA[3]
I/O,
CMOS
N/A
ULPI bi-directional data bus.
7 DATA[4]
I/O,
CMOS
N/A
ULPI bi-directional data bus.
8 REFSEL[0]
Input,
CMOS
N/A
This signal, along with REFSEL[1] and
REFSEL[2] selects one of the available
reference frequencies as defined in
Table 5.10.
Note: This signal must be tied to VDDIO
when in ULPI 60MHz REFCLK IN mode.
9 DATA[5]
I/O,
CMOS
N/A
ULPI bi-directional data bus.
10 DATA[6]
I/O,
CMOS
N/A
ULPI bi-directional data bus.
11 REFSEL[1]
Input,
CMOS
N/A
This signal, along with REFSEL[0] and
REFSEL[2] selects one of the available
reference frequencies as defined in
Table 5.10.
Note: This signal must be tied to VDDIO
when in ULPI 60MHz REFCLK IN mode.
12 N/C
N/A
This pin must not be connected.
13 DATA[7]
I/O,
CMOS
N/A
ULPI bi-directional data bus.
14 REFSEL[2]
Input,
CMOS
N/A
This signal, along with REFSEL[0] and
REFSEL[1] selects one of the available
reference frequencies as defined in
Table 5.10.
Note: This signal must be tied to VDDIO
when in ULPI 60MHz REFCLK IN mode.
15 SPK_L
I/O,
Analog
N/A USB switch in/out for DM signals
16 SPK_R
I/O,
Analog
N/A USB switch in/out for DP signals
Table 2.1 USB3320 Pin Description (continued)
PIN NAME
DIRECTION/
TYPE
ACTIVE
LEVEL DESCRIPTION