Datasheet

Hi-Speed USB Host, Device or OTG PHY with ULPI Low Pin Interface
Datasheet
Revision 1.1 (01-24-13) 46 SMSC USB3300
DATASHEET
6.5.2.4 Vbus Pull-up and Pull-down Resistors
In addition to the internal Vbus comparators the USB3300 also includes the integrated Vbus pull-up
and pull-down resistors used for Vbus Pulsing. To discharge the Vbus voltage, so that a Session
Request can begin, the USB3300 provides a pull-down resistor from Vbus to Ground. This resistor is
controlled by the DischargeVbus bit 3 of the OTG Control register, defined in the ULPI specifications.
The pull-up resistor is connected between Vbus and VDD3.3. This resistor is used to pull Vbus above
2.1 volts so that the A-Device knows that a USB session has been requested. The state of the pull-
up resistor is controlled by the bit 4 ChargeVbus of the OTG Control register, defined in the ULPI
specifications. The Pull-Up and Pull-Down resistor values are detailed in Table 5.6.
6.5.2.5 Vbus Input Impedance
The OTG Supplement requires an A-Device that supports Session request protocol to have an input
impedance less than 100kohm and greater the 40kohm to ground. In addition, if configured as a B-
Device, the PHY cannot draw more then 150uA from Vbus. The USB3300 provides a 75kΩ nominal
resistance to ground which meets the above requirements, see Tab le 5.6.
6.5.3 Driving External Vbus
When a system is operating as a host, it is required to source 5 volts on VBUS. The USB3300 fully
supports VBUS power control using external devices. The USB3300 provides an active high control
signal, CPEN, which is dedicated to controlling the Vbus supply when configured as an A-Device. The
USB3300 also supports external Vbus fault detection detailed in Section 6.5.4.
CPEN is asserted when the ULPI OTG Control register bit 5 DrvVbus or bit 6, DrvVbusExternal is set
high. To be compatible with Link designs that support both internal and external Vbus supplies the
DrvVbus and DrvVbusExternal bits in the OTG Control Register are or’d together. This enables the
Link to set either bit to access the external Vbus enable (CPEN.) This logic is shown in Figure 6.10,
"USB3300 On-the-Go Module". DrvVbus and DrvVbusExternal are set to 0 on POR.
6.5.4 External Vbus Indicator
The USB3300 has fully implemented the External Vbus detection described in the ULPI 1.1
specification. The block diagram of the External Vbus detection is shown in Figure 6.10 and in
Table 6.10.
Table 6.10 External Vbus Indicator Logic
TYPICAL
APPLICATION
USE
EXTERNAL
VBUS
INDICATOR
INDICATOR
PASS THRU
INDICATOR
COMPLEMENT
RXCMD VBUS VALID
ENCODING SOURCE
OTG Device 0 X X Internal VbusVld comparator (Default)
1 1 0 External active high VbusVld signal
1 1 1 External active low VbusVld signal
1 0 0 External active high power fault signal
qualified with internal VbusVld
comparator. (Note 6.1)
1 0 1 External active low power fault signal
qualified with internal VbusVld
comparator. (Note 6.1)