Datasheet

28
Signal Chain Design Guide
LINEAR: Programmable Gain Amplifiers (PGA)
Device Channels
−3 dB BW (MHz)
Typ.
I
q (µA) Max. Vos (±µV) Max. Operating Voltage (V) Temperature Range (°C) Features Packages
MCP6S21/2/6/8 1, 2, 6, 8 2 to 12 1.1 275 2.5 to 5.5 −40 to +85 SPI, 8 Gain Steps, Software Shutdown PDIP, SOIC, MSOP, TSSOP
MCP6S912/3 1, 2, 2 1 to 18 1.0 4000 2.5 to 5.5 −40 to +125 SPI, 8 Gain Steps, Software Shutdown, V
ref PDIP, SOIC, MSOP
Mixed Signal
MIXED SIGNAL: Delta−Sigma A/D Converters
Device
Resolution
(bits)
Max.Sample Rate
(samples/sec)
# of Input
Channels
Interface
Supply
Voltage (V)
Typical Supply
Current (µA)
Typical INL
(ppm)
Temperature
Range (°C)
Features Packages
Featured Demo
Board
MCP3421 18 3.75 1 Diff I
2
C™ 2.7 to 5.5
145
(continuous)
39 (one shot)
10 −40 to +85
PGA: 1, 2, 4 or 8
Internal voltage reference
SOT-23-6 MCP3421EV
MCP3422 18 3.75 2 Diff I
2
C 2.7 to 5.5 145 10 −40 to +85
PGA: 1, 2, 4, or 8
Internal voltage reference
SOIC-8, MSOP-8,
DFN-8
MCP3422EV,
MCP3421DM-BFG
MCP3423 18 3.75 2 Diff I
2
C 2.7 to 5.5 145 10 −40 to +85
PGA: 1, 2, 4, or 8
Internal voltage reference
MSOP-10, DFN-10 MCP3423EV
MCP3424 18 3.75 4 Diff I
2
C 2.7 to 5.5 145 10 −40 to +85
PGA: 1, 2, 4, or 8
Internal voltage reference
SOIC-14, TSSOP-14 MCP3424EV
MCP3425 16 15 1 Diff I
2
C 2.7 to 5.5 155 10 −40 to +85
PGA: 1, 2, 4, or 8
Internal voltage reference
SOT-23-6
MCP3425EV,
MCP3421DM-BFG
MCP3426 16 15 2 Diff I
2
C 2.7 to 5.5 145 10 −40 to +85
PGA: 1, 2, 4, or 8
Internal voltage reference
SOIC-8, MSOP-8,
DFN-8
–
MCP3427 16 15 2 Diff I
2
C 2.7 to 5.5 145 10 −40 to +85
PGA: 1, 2, 4, or 8
Internal voltage reference
MSOP-10, DFN-10 –
MCP3428 16 15 4 Diff I
2
C 2.7 to 5.5 145 10 −40 to +85
PGA: 1, 2, 4, or 8
Internal voltage reference
SOIC-14, TSSOP-14 –
MCP3550−50 22 13 1 Diff SPI 2.7 to 5.5 120 2 −40 to +85 50 Hz noise rejection > 120 dB SOIC-8, MSOP-8 MCP3551DM-PCTL
MCP3550−60 22 15 1 Diff SPI 2.7 to 5.5 140 2 −40 to +85 60 Hz noise rejection > 120 dB SOIC-8, MSOP-8 MCP3551DM-PCTL
MCP3551 22 14 1 Diff SPI 2.7 to 5.5 120 2 −40 to +85 Simultaneous 50/60 Hz rejection SOIC-8, MSOP-8 MCP3551DM-PCTL
MCP3553 20 60 1 Diff SPI 2.7 to 5.5 140 2 −40 to +85 – SOIC-8, MSOP-8 MCP3551DM-PCTL
MCP3901 16/24 64000 2 Diff SPI 4.5 to 5.5 2050 15 −40 to +125
Two ADCs, Programmable Data Rate,
PGA, Phase Compensation
SSOP-20, QFN-20 MCP3901EV-MCU16
MCP3903 16/24 64000 6 Diff SPI 4.5 to 5.5 8300 15 −40 to +125
Six ADCs, Programmable Data Rate,
PGA, Phase Compensation
SSOP-28 ADM00310
MCP3911 16/24 64000 2 Diff SPI 2.7 to 3.6 1700 5 −40 to +125
Two ADCs, Programmable Data Rate,
PGA, Phase Compensation
SSOP-20, QFN-20 ADM00398