User manual

PT100 RTD EVALUATION
BOARD USER’S GUIDE
© 2007 Microchip Technology Inc. DS51607B-page 13
Appendix A. Schematic and Layouts
A.1 INTRODUCTION
This appendix contains the following schematics and layouts for the PT100 RTD
Evaluation Board:
• Board Schematic
• Board - Top Layer
• Board - Silk-screen Layer
• Board - Bottom Layer