Datasheet

ManualsBrandsMICROCHIP TECHNOLOGY ManualsDev KitsPCB design board

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 2009-2012 Microchip Technology Inc. DS70594D-page 365

dsPIC33FJXXXMCX06A/X08A/X10A

Pinout I/O Descriptions (table) ............................................ 15

PMD Module

POR and Long Oscillator Start-up Times............................ 84

PORTA

PORTB

PORTC

PORTD

PORTE

PORTF

PORTG

Power-Saving Features .................................................... 153

Clock Frequency and Switching................................ 153

Program Address Space..................................................... 35

Construction................................................................ 68

Data Access from Program Memory Using

Program Space Visibility..................................... 71

Data Access from Program Memory Using

Table Instructions ............................................... 70

Data Access from, Address Generation...................... 69

Memory Map............................................................... 35

Table Read High Instructions

TBLRDH ............................................................. 70

Table Read Low Instructions

TBLRDL .............................................................. 70

Visibility Operation ...................................................... 71

Program Memory

Interrupt Vector ........................................................... 36

Organization................................................................ 36

Reset Vector ............................................................... 36

Quadrature Encoder Interface (QEI)................................. 193

Quadrature Encoder Interface (QEI) Module

Reader Response ............................................................. 370

Registers

ADxCHS0 (ADCx Input Channel 0 Select) ............... 256

ADxCHS123 (ADCx Input

Channel 1, 2, 3 Select) ..................................... 255

ADxCON1 (ADCx Control 1)..................................... 249

ADxCON2 (ADCx Control 2)..................................... 251

ADxCON3 (ADCx Control 3)..................................... 253

ADxCON4 (ADCx Control 4)..................................... 254

ADxCSSH (ADCx Input Scan Select High)............... 257

ADxCSSL (ADCx Input Scan Select Low) ................ 257

ADxPCFGH (ADCx Port Configuration High) ........... 258

ADxPCFGL (ADCx Port Configuration Low)............. 258

CiBUFPNT1 (ECAN Filter 0-3 Buffer Pointer)........... 231

CiBUFPNT2 (ECAN Filter 4-7 Buffer Pointer)........... 232

CiBUFPNT3 (ECAN Filter 8-11 Buffer Pointer)......... 233

CiBUFPNT4 (ECAN Filter 12-15 Buffer Pointer)....... 234

CiCFG1 (ECAN Baud Rate Configuration 1) ............ 228

CiCFG2 (ECAN Baud Rate Configuration 2) ............ 229

CiCTRL1 (ECAN Control 1) ...................................... 220

CiCTRL2 (ECAN Control 2) ...................................... 221

CiEC (ECAN Transmit/Receive Error Count)............ 227

CiFCTRL (ECAN FIFO Control) ............................... 223

CiFEN1 (ECAN Acceptance Filter Enable)............... 230

CiFIFO (ECAN FIFO Status) .................................... 224

CiFMSKSEL1 (ECAN Filter 7-0 Mask Selection) ..... 236

CiFMSKSEL2 (ECAN Filter 15-8 Mask

Selection) ......................................................... 237

CiINTE (ECAN Interrupt Enable) .............................. 226

CiINTF (ECAN Interrupt Flag) .................................. 225

CiRXFnEID (ECAN Acceptance Filter n

Extended Identifier) .......................................... 235

CiRXFnSID (ECAN Acceptance Filter n

Standard Identifier)........................................... 235

CiRXFUL1 (ECAN Receive Buffer Full 1)................. 239

CiRXFUL2 (ECAN Receive Buffer Full 2)................. 239

CiRXMnEID (ECAN Acceptance Filter

Mask n Extended Identifier).............................. 238

CiRXMnSID (ECAN Acceptance Filter Mask n

Standard Identifier)........................................... 238

CiRXOVF1 (ECAN Receive Buffer Overflow 1)........ 240

CiRXOVF2 (ECAN Receive Buffer Overflow 2)........ 240

CiTRBnDLC (ECAN Buffer n Data

Length Control)................................................. 243

CiTRBnDm (ECAN Buffer n Data Field Byte m) ....... 243

CiTRBnEID (ECAN Buffer n Extended Identifier) ..... 242

CiTRBnSID (ECAN Buffer n Standard Identifier)...... 242

CiTRBnSTAT (ECAN Receive Buffer n Status)........ 244

CiTRmnCON (ECAN TX/RX Buffer m Control) ........ 241

CiVEC (ECAN Interrupt Code) ................................. 222

CLKDIV (Clock Divisor) ............................................ 148

CORCON (Core Control) ...................................... 28, 90

DFLTxCON (Digital Filter x Control) ......................... 196

DMACS0 (DMA Controller Status 0) ........................ 139

DMACS1 (DMA Controller Status 1) ........................ 141

DMAxCNT (DMA Channel x Transfer Count) ........... 138

DMAxCON (DMA Channel x Control)....................... 135

DMAxPAD (DMA Channel x

Peripheral Address).......................................... 138

DMAxREQ (DMA Channel x IRQ Select) ................. 136

DMAxSTA (DMA Channel x RAM Start

Address Offset A) ............................................. 137

DMAxSTB (DMA Channel x RAM Start

Address Offset B) ............................................. 137

DSADR (Most Recent DMA RAM Address) ............. 142

I2CxCON (I2Cx Control)........................................... 206

I2CxMSK (I2Cx Slave Mode Address Mask)............ 210

I2CxSTAT (I2Cx Status) ........................................... 208

ICxCON (Input Capture x Control)............................ 174

IEC0 (Interrupt Enable Control 0) ............................. 103

IEC1 (Interrupt Enable Control 1) ............................. 105

IEC2 (Interrupt Enable Control 2) ............................. 107

IEC3 (Interrupt Enable Control 3) ............................. 109

IEC4 (Interrupt Enable Control 4) ............................. 111

IFS0 (Interrupt Flag Status 0) ..................................... 94

IFS1 (Interrupt Flag Status 1) ..................................... 96

IFS2 (Interrupt Flag Status 2) ..................................... 98

IFS3 (Interrupt Flag Status 3) ................................... 100

IFS4 (Interrupt Flag Status 4) ................................... 102

INTCON1 (Interrupt Control 1) ................................... 91

INTCON2 (Interrupt Control 2) ................................... 93

INTTREG (Interrupt Control and Status) .................. 130

IPC0 (Interrupt Priority Control 0) ............................. 112

IPC1 (Interrupt Priority Control 1) ............................. 113

IPC10 (Interrupt Priority Control 10) ......................... 122

IPC11 (Interrupt Priority Control 11) ......................... 123

IPC12 (Interrupt Priority Control 12) ......................... 124