Datasheet
4
TC7662B
CHARGE PUMP DC-TO-DC
VOLTAGE CONVERTER
TC7662B-8 9/11/96
© 2001 Microchip Technology Inc. DS21469A
4. When using polarized capacitors in the inverting mode,
the + terminal of C
1
must be connected to pin 2 of the
TC7662B and the – terminal of C
2
must be connected
to GND.
5. If the voltage supply driving the TC7662B has a large
source impedance (25-30 ohms), then a 2.2µF capaci-
tor from pin 8 to ground may be required to limit the
rate of rise of the input voltage to less than 2V/µsec.
TYPICAL APPLICATIONS
Simple Negative Voltage Converter
The majority of applications will undoubtedly utilize the
TC7662B for generation of negative supply voltages. Figure
3 shows typical connections to provide a negative supply
where a positive supply of +1.5V to +15V is available. Keep
in mind that pin 6 (LV) is tied to the supply negative (GND)
for supply voltages below 3.5 volts.
a. b.
The output characteristics of the circuit in Figure 3 can
be approximated by an ideal voltage source in series with a
resistance as shown in Figure 3b. The voltage source has a
value of–(V+). The output impedance (R
O
) is a function of
the ON resistance of the internal MOS switches (shown in
Figure 2), the switching frequency, the value of C
1
and C
2
,
and the ESR (equivalent series resistance) of C
1
and C
2
. A
good first order approximation for R
O
is:
R
O
≅ 2(R
SW1
+ R
SW3
+ ESR
C1
) + 2(R
SW2
+ R
SW4
+
ESR
C1
) + + ESR
C2
(f
PUMP
= , R
SWX
= MOSFET switch resistance)
Combining the four R
SWX
terms as R
SW
, we see that:
R
O
≅ 2 x R
SW
+ + 4 x ESR
C1
+ ESR
C2
Ω
R
SW
, the total switch resistance, is a function of supply
1
f
PUMP
x C
1
f
OSC
2
1
f
PUMP
x C
1
t
2
t
1
B
A
V
–
(V+)
0
Figure 4. Output Ripple
Figure 3. Simple Negative Converter and its Output Equivalent
1
2
3
4
8
7
6
5
TC7662B
10 µF
+
V+
+
10 µF
V
OUT
= –V+
–
–
V
OUT
R
O
V+
+
–
1
2 x f
PUMP
x C
2
1
(5 x 10
3
x 10 x 10
-6
)
voltage and temperature (See the Output Source Resis-
tance graphs), typically 23Ω at +25°C and 5V. Careful
selection of C
1
and C
2
will reduce the remaining terms,
minimizing the output impedance. High value capacitors will
reduce the 1/(f
PUMP
x C
1
) component, and low ESR capaci-
tors will lower the ESR term. Increasing the oscillator fre-
quency will reduce the 1/(f
PUMP
x C
1
) term, but may have the
side effect of a net increase in output impedance when C
1
>
10µF and there is not enough time to fully charge the
capacitors every cycle. In a typical application when f
OSC
=
10kHz and C = C
1
= C
2
= 10µF:
R
O
≅ 2 x 23 + + 4 x ESR
C1
+ ESR
C2
R
O
≅ (46 + 20 + 5 x ESR
C
)
Ω
Since the ESRs of the capacitors are reflected in the
output impedance multiplied by a factor of 5, a high value
could potentially swamp out a low 1/(f
PUMP
x C
1
) term,
rendering an increase in switching frequency or filter capaci-
tance ineffective. Typical electrolytic capacitors may have
ESRs as high as 10Ω.
Output Ripple
ESR also affects the ripple voltage seen at the output.
The total ripple is determined by 2 voltages, A and B, as
shown in Figure 4. Segment A is the voltage drop across the
ESR of C
2
at the instant it goes from being charged by C
1
(current flowing into C
2
) to being discharged through the
load (current flowing out of C
2
). The magnitude of this
current change is 2 x I
OUT
, hence the total drop is 2 x I
OUT
x
ESR
C2
volts. Segment B is the voltage change across C
2
during time t
2
, the half of the cycle when C
2
supplies current
to the load. The drop at B is I
OUT
x t
2
/C
2
volts. The peak-to-
peak ripple voltage is the sum of these voltage drops:
V
RIPPLE
≅ ( + ESR
C2
x I
OUT
)