Datasheet

TC7650
DS21463C-page 4  2001-2012 Microchip Technology Inc.
2.0 PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 2-1.
TABLE 2-1: PIN FUNCTION TABLE
3.0 DETAILED DESCRIPTION
3.1 Theory of Operation
Figure 3-1 shows the major elements of the TC7650.
There are two amplifiers (the main amplifier and the
nulling amplifier), and both have offset null capability.
The main amplifier is connected full-time from the input
to the output. The nulling amplifier, under the control of
the chopping frequency oscillator and clock circuit,
alternately nulls itself and the main amplifier. Two exter-
nal capacitors provide the required storage of the null-
ing potentials and the necessary nulling loop time
constants. The nulling arrangement operates over the
full common mode and power supply ranges, and is
also independent of the output level, thus giving excep-
tionally high CMRR, PSRR and A
VOL
.
Careful balancing of the input switches minimizes
chopper frequency charge injection at the input termi-
nals, and the feed forward type injection into the com-
pensation capacitor that can cause output spikes in this
type of circuit.
The circuit's offset voltage compensation is easily
shown. With the nulling inputs shorted, a voltage
almost identical to the nulling amplifier offset voltage is
stored on C
A
. The effective offset voltage at the null
amplifier input is:
EQUATION 3-1:
After the nulling amplifier is zeroed, the main amplifier
is zeroed; the A switches open and B switches close.
The output voltage equation is:
EQUATION 3-2:
EQUATION 3-3:
As desired, the device offset voltages are reduced by
the high open loop gain of the nulling amplifier.
3.2 Output Stage/Loading
The output circuit is a high impedance stage (approxi-
mately 18k). With loads less than this, the chopper
amplifier behaves in some ways like a trans-conduc-
tance amplifier whose open-loop gain is proportional to
load resistance. For example, the open loop gain will
be 17dB lower with a 1k load than with a 10k load.
If the amplifier is used strictly for DC, the lower gain is
of little consequence, since the DC gain is typically
greater than 120dB, even with a 1k load. In wideband
applications, the best frequency response will be
achieved with a load resistor of 10k or higher. This
results in a smooth 6dB/octave response from 0.1Hz to
2MHz, with phase shifts of less than 10° in the transi-
Pin Number
Symbol Description
8-pin DIP 14-pin DIP
1,8 2,1 C
A
, C
B
Nulling capacitor pins
2 4 -INPUT Inverting Input
3 5 +INPUT Non-inverting Input
47 V
SS
Negative Power Supply
59OUTPUT
CLAMP
Output Voltage Clamp
610OUTPUTOutput
711 V
DD
Positive Power Supply
— 3,6 NC No internal connection
—8C
RETN
Capacitor current return pin
— 12 INT CLK OUT Internal Clock Output
— 13 EXT CLK IN External Clock Input
— 14 INT/EXT
Select Internal or External Clock
V
OSE
1
A
N
1+
------------------V
OSN
=
V
OUT
= A
M
V
OSM
+ (V
+
- V
-
) + A
N
(V
+
- V
-
) + A
N
V
OSE

V
OUT
A
M
A
N
V
+
V
-
–
V
OSM
V
OSN
+
A
N
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