Datasheet

 2002-2013 Microchip Technology Inc. DS21737B-page 21
TC664/TC665
6.5 DUTY-CYCLE Register
(DUTY_CYCLE)
The DUTY_CYCLE register is a 4-bit read/writable reg-
ister used to control the duty cycle of the V
OUT
output.
The controllable duty cycle range via this register is
30% to 100%, with programming steps of 4.67%.This
method of duty cycle control is mainly used with the
SMBus interface. However, if the V
IN
method of duty
cycle control has been selected (or defaulted to), and
the V
IN
pin is open, the duty cycle will go to the default
setting for this register, which is 0010 (39.33%). The
duty cycle settings are shown in Register 6-5.
REGISTER 6-5: DUTY-CYCLE REGISTER
(DUTY_CYCLE)
6.6 Manufacturer’s Identification
Register (MFR_ID)
This register allows the user to identify the manufac-
turer of the part. The MFR_ID register is an 8-bit Read
only register. See Register 6-6 for the Microchip manu-
facturer ID.
REGISTER 6-6: MANUFACTURER’S
IDENTIFICATION
REGISTER (MFR_ID)
6.7 Version ID Register (VER_ID)
This register is used to indicate which version of the
device is being used, either the TC664 or the TC665.
This register is a simple 2-bit Read only register.
REGISTER 6-7: VERSION ID REGISTER
(VER_ID)
D(3)
D(2) D(1) D(0) Duty-Cycle
000030%
0 0 0 1 34.67%
0 0 1 0 39.33% (default for V
IN
open and when SMBus
is not selected)
001144%
0 1 0 0 48.67%
0 1 0 1 53.33%
011058%
0 1 1 1 62.67%
1 0 0 0 67.33%
100172%
1 0 1 0 76.67%
1 0 1 1 81.33%
110086%
1 1 0 1 90.67%
1 1 1 0 95.33%
1 1 1 1 100%
D[7] D[6] D[5] D[4] D[3] D[2] D[1] D[0]
01010100
D[1] D[0] Version
10TC664
11TC665