Datasheet

 2002-2013 Microchip Technology Inc. DS21737B-page 11
TC664/TC665
4.3 Fan Startup
Often overlooked in fan speed control is the actual
startup control period. When starting a fan from a non-
operating condition (fan speed is zero RPM), the
desired PWM duty cycle or average fan voltage can not
be applied immediately. Since the fan is at a rest posi-
tion, the fan’s inertia must be overcome to get it started.
The best way to accomplish this is to apply the full rated
voltage to the fan for one second. This will ensure that
in all operating environments, the fan will start and
operate properly.
The TC664/TC665 devices implement this fan control
feature without any user programming. During a power
up or release from shutdown condition, the TC664/
TC665 devices force the V
OUT
output to a 100% duty
cycle, turning the fan full on for one second (C
F
=
1.0 µF). Once the one second period is over, the
TC664/TC665 devices will look to see if SMBus or V
IN
control has been selected in the Configuration Register
(DUTYC bit 5<0>). Based on this register, the device
will choose which input will control the V
OUT
duty cycle.
Duty cycle control based on V
IN
is the default state. If
V
IN
control is selected and the V
IN
pin is open (nothing
is connected to the V
IN
pin), then the TC664/TC665 will
default to a duty cycle of 39.33%. This sequence is
shown in Figure 4-4. This integrated one second
startup feature will ensure the fan starts up every time.
FIGURE 4-4: Power-up Flow Chart.
4.4 PWM Drive Frequency (C
F
)
As previously discussed, the TC664/TC665 devices
operate with a fixed PWM frequency. The frequency of
the PWM drive output (V
OUT
) is set by a capacitor at the
C
F
pin. With a 1 µF capacitor at the C
F
pin, the typical
drive frequency is 30 Hz. This frequency can be raised,
by decreasing the capacitor value, or lowered, by
increasing the capacitor value. The relationship
between the capacitor value and the PWM frequency is
linear. If a frequency of 15 Hz is desired, a capacitor
value of 2.0 µF should be used. The frequency should
be kept in the range of 15 Hz to 35 Hz. See Section 7.2
for more details.
4.5 Duty Cycle Control (V
IN
and Duty-
Cycle Register)
The duty cycle of the V
OUT
PWM drive signal can be
controlled by either the V
IN
analog input pin or by the
Duty-Cycle Register, which is accessible via the
SMBus interface. The control method is selectable via
DUTYC (bit 5<0>) of the Configuration Register. The
default state is for V
IN
control. If V
IN
control is selected
and the V
IN
pin is open, the PWM duty cycle will default
to 39.33%. The duty cycle control method can be
changed at any time via the SMBus interface.
V
IN
is an analog input pin. A voltage in the range of
1.62 V to 2.6 V (typical) at this pin commands a 30% to
100% duty cycle on the V
OUT
output, respectively. If the
voltage at V
IN
falls below the 1.62 V level, the duty
cycle will not go below 30%. The relationship between
the voltage at V
IN
and the PWM duty cycle is shown in
Figure 4-5.
FIGURE 4-5: PWM Duty Cycle vs. Input
Voltage, V
IN
(Typical).
For the TC665 device, if the voltage at V
IN
exceeds the
2.6 V (typical) level, an over temperature fault indica-
tion will be given by asserting a low at the FAULT
output
and setting OTF (bit 5<X>) in the Status Register to a
‘1’.
A thermistor network or any other voltage output ther-
mal sensor can be used to provide the voltage to the
V
IN
input. The voltage supplied to the V
IN
pin can actu-
ally be thought of as a temperature. For example, the
circuit shown in Figure 4-6 represents a typical solution
for a thermistor based temperature sensing network.
See Section 7.3 for more details.
Power Up or Release
from SHDN
One Second Pulse
Select SMBus
NO
V
IN
Open?
NO
YES
YES
Default PWM: 39.33%
SMBus PWM Duty
Cycle Control
V
IN
PWM Duty
Cycle Control
0
10
20
30
40
50
60
70
80
90
100
1 1.2 1.4 1.6 1.8 2 2.2 2.4 2.6 2.8
Input Voltage (V
IN
)
Duty Cycle (%)