Datasheet

 2002-2013 Microchip Technology Inc. DS21756C-page 25
TC642B/TC647B
FIGURE 5-13: Design Example Schematic.
Bypass capacitor C
VDD
is added to the design to
decouple the bias voltage. This is good to have, espe-
cially when using a MOSFET as the drive device. This
helps to give a localized low-impedance source for the
current required to charge the gate capacitance of Q
1
.
Two other bypass capacitors, labeled as C
B
, were also
added to decouple the V
IN
and V
MIN
nodes. These
were added simply to remove any noise present that
might cause false triggerings or PWM jitter. R
5
is the
pull-up resistor for the FAULT
output. The value for this
resistor is system-dependent.
FAULT
SENSE
R
1
R
2
R
3
32.4 k
R
4
GND
Q
1
+12V
+5V
V
DD
V
IN
V
MIN
V
OUT
R
SENSE
C
SENSE
C
F
1.0 µF
C
F
TC647B
Fan
C
B
0.01 µF
C
B
0.01 µF
+
4
5
7
6
8
1
3
2
+5V
17.8 k
237 k
45.3 k
R
5
10 k
0.1 µF
SI2302
or
MGSF1N02E
Panasonic
®
12V, 140 mA
FBA06T12H
Thermometrics
®
100 k @25°C
NHQ104B425R5
C
VDD
1.0 µF
3.0