Datasheet

 2001-2011 Microchip Technology Inc. DS21434J-page 5
TC54
3.0 DETAILED DESCRIPTION
In normal steady-state operation when V
IN
>V
DET
–
,
the output will be at a logic-high (see Figure 3-1). In the
case of the TC54VN, this is an open-drain condition. If
the input falls below V
DET
–
, the output will pull down
(Logic 0) to V
SS
. Generally, V
OUT
can pull down to
within 0.5V of V
SS
at rated output current and input
voltage. (See Section 1.0 “Electrical
Characteristics”).
The output (V
OUT
) will stay valid until the input voltage
falls below the minimum operating voltage (V
INMIN
) of
0.7V. Below this minimum operating voltage, the output
is undefined. During power-up (or anytime V
IN
has
fallen below V
INMIN
), V
OUT
will remain undefined until
V
IN
rises above V
INMIN
. When this occurs, the output
will become valid. V
OUT
will be in its Active-low state,
while V
INMIN
<V
IN
<V
DET
+ (therefore, V
DET
+ = V
DET
–
+ V
HYST
). If the input rises above V
DET
+, the output will
assume its Inactive state (high for TC54VC, open-drain
for TC54VN).
FIGURE 3-1: Timing Diagram.
V
IN
Detect Voltage V
DET
–
Minimum Operating
Voltage
V
HYST
V
DET
+
Output Voltage
Release Voltage
or RESET Voltage
Ground Level
Ground Level
V
OUT