Datasheet

 2001-2012 Microchip Technology Inc. DS21431C-page 9
TC520A
FIGURE 4-3: Typical System Application
FIGURE 4-4: TC520A timing diagram
INT
CAZ
BUF
IN+
IN–
REF+
REF–
COM
1
4
3
OSC
OUT
V+
LOAD
READ
D
CLK
D
IN
D
OUT
C
INT
C
AZ
R
INT
1µF
Analog Ground
.01µ
.01µ
11
10
9
8
5
100k
16
OSC
IN
CMPTR
B
A
DV
CE
GND
14
13
12
6
7
15
2
DGND
2
14
13
5
4
Crystal
6
7
3
C
REF
12
8
10
11
9
TC520A
TC500
+5V
SI
V
IN
-
V
IN
+
SO
SK
RD
LD
10k
DV
CE
1
-5V
MCP1525
V+
CMPTR
B
A
CR–
CR+
GND
V
READ
D
OUT
T
RD
D
CLK
T
RS
LOAD
D
IN
T
LS
D
CLK
T
DLS
Read Timing
Load Timing
Read Format
READ
D
OUT
D
CLK
LOAD
D
IN
MSB
D
CLK
READ
LSB
Load Format
OVR
POL
MSB
LSB
T
PWL
T
PWH
LOAD
D
IN
T
LDL
Load Default Timing
T
LDS
T
DRS