Datasheet

TC500/A/510/514
DS21428E-page 12 © 2008 Microchip Technology Inc.
FIGURE 5-1: Typical Dual Slope A/D Converter System Timing.
Auto-zero Integrate
Full-scale Input
Reference
De-integrate
Overshoot Integrator
Output
Zero
Converter Status
T
TIME
Integrator
Voltage V
INT
Comparator
Output
AB Inputs
Controller
Operation
Notes:
Comparator Delay
Begin Conversion with
Auto-Zero Phase
(Positive Input Shown)
Sample Input Polarity
The length of this phase is chosen almost arbitrarily
but needs to be long enough to null out worst case errors
(see text).
Minimizing
Overshoot
will Minimize
I.O.Z. Time
Ready for Next
Conversion
(Auto-Zero is
Idle State)
Time Input
Integration
Phase
Capture
De-integration
Time
Integrator
Output
Zero Phase
Complete
Undefined
A = 0
B = 1
A = 1
0 For Negative Input
1 For Positive Input
B = 0
B = 1
B = 0
A = 1
A = 0
Typically = T
INT
T
INT
0
A
B
Comparator Delay +
Processor Latency