Datasheet

© 2005 Microchip Technology Inc. DS21666B-page 11
TC1016
5.0 THERMAL CONSIDERATIONS
5.1 Thermal Shutdown
Integrated thermal-protection circuitry shuts the
regulator off when die temperature exceeds
approximately 160°C. The regulator remains off until
the die temperature drops to approximately 150°C.
5.2 Power Dissipation
The TC1016 is available in the SC-70 package. The
thermal resistance for the SC-70 package is approxi-
mately 450°C/W when the copper area used in the
PCB layout is similar to the JEDEC J51-7 high thermal
conductivity or Semi G42-88 standards. For applica-
tions with larger or thicker copper areas, the thermal
resistance can be lowered. See AN792 “A Method to
Determine How Much Power a SOT23 Can Dissipate in
an Application” (DS00792), for a method to determine
the thermal resistance for a particular application.
The TC1016 power dissipation capability is dependant
upon several variables: input voltage, output voltage,
load current, ambient temperature and maximum
junction temperature. The absolute maximum steady-
state junction temperature is rated at 125°C. The power
dissipation within the device is equal to:
EQUATION 5-1:
The V
IN
x I
GND
term is typically very small when com-
pared to the (V
IN
-V
OUT
) x I
LOAD
term simplifying the
power dissipation within the LDO to be:
EQUATION 5-2:
To determine the maximum power dissipation
capability, the following equation is used:
EQUATION 5-3:
Given the following example:
Find:
1. Internal power dissipation:
2. Junction temperature:
3. Maximum allowable dissipation:
In this example, the TC1016 dissipates approximately
82.2 mW and the junction temperature is raised 37°C
over the 55°C ambient to 92°C. The absolute maximum
power dissipation is 155 mW when given a maximum
ambient temperature of 55°C.
Input voltage, output voltage or load current limits can
also be determined by substituting known values in
Equation 5-2 and Equation 5-3.
5.3 Layout Considerations
The primary path for heat conduction out of the SC-70
package is through the package leads. Using heavy,
wide traces at the pads of the device will facilitate the
removal of heat within the package, thus lowering the
thermal resistance Rθ
JA
. By lowering the thermal
resistance, the maximum internal power dissipation
capability of the package is increased.
FIGURE 5-1: Suggested layout
P
D
V
IN
V
OUT
–()I
LOAD
V
IN
I
GND
×+×=
P
D
V
IN
V
OUT
–()I
LOAD
×=
P
DMAX
T
J_MAX
T
A_MAX
–()
Rθ
JA
-------------------------------------------------
=
Where:
T
J_MAX
= maximum junction temperature allowed
T
A_MAX
= the maximum ambient temperature allowed
Rθ
JA
= the thermal resistance from junction-to-air
V
IN
= 3.0V to 4.1V
V
OUT
= 2.8V ±2.5%
I
LOAD
= 60 mA (output current)
T
AMAX
= 55°C (max. ambient temp.)
P
DMAX
V
IN_MAX
V
OUT_MIN
–()I
LOAD
×=
4.1V 2.8 0.975()×–()60mA×=
82.2mW=
T
J_MAX
P
DMAX
Rθ
JA
×=
82.2mWatts 450°C/W T
AMAX
+×=
92°C=
37°C 55°C+=
P
D
T
J_MAX
T
A_MAX
–
Rθ
JA
--------------------------------------------
=
155mW=
125°C 55°C–
450°C/W
-----------------------------------
=
SHDN
U1
V
IN
V
OUT
GND
C
1
C
2