Datasheet

©2011 Silicon Storage Technology, Inc. DS25029A 06/11
33
16 Mbit LPC Serial Flash
SST49LF016C
Data Sheet
A
Microchip Technology Company
Figure 11:Reset Timing Diagram (LPC MODE)
Table 27:Reset Timing Parameters, V
DD
=3.0-3.6V (LPC Mode)
Symbol Parameter Min Max Units
T
PRST
V
DD
stable to Reset High 100 µs
T
RSTP
RST# Pulse Width 100 ns
T
RSTF
RST# Low to Output Float 48 ns
T
RST
1
RST# High to LFRAME# Low 5 LCLK cycles
T
RSTE
RST# Low to reset during Sector-/Block-Erase or
Program
10 µs
T27.0 25029
1. There will be a latency due to T
RSTE
if a reset procedure is performed during a Program or Erase operation,
V
DD
RST#/INIT#
LFRAME#
LAD[3:0]
1237 F10.1
T
PRST
T
RSTP
T
RSTF
T
RSTE
Sector-/Block-Erase
or Program operation
aborted
T
RST