Datasheet

©2011 Silicon Storage Technology, Inc. DS25085A 10/11
20
8 Mbit Firmware Hub
SST49LF008A
Data Sheet
A
Microchip Technology Company
Data Protection
The SST49LF008A device provides both hardware and software features to protect nonvolatile data
from inadvertent writes.
Hardware Data Protection
Noise/Glitch Protection: A WE# pulse of less than 5 ns will not initiate a Write cycle.
V
DD
Power Up/Down Detection: The Write operation is inhibited when V
DD
is less than 1.5V.
Write Inhibit Mode: Forcing OE# low, WE# high will inhibit the Write operation. This prevents inadver-
tent writes during power-up or power-down.
Software Data Protection (SDP)
SST49LF008A provides the JEDEC approved Software Data Protection scheme for all data alteration
operation, i.e., Program and Erase. Any Program operation requires the inclusion of a series of three-
byte sequences. The three-byte load sequence is used to initiate the Program operation, providing
optimal protection from inadvertent Write operations, e.g., during the system power-up or power-down.
Any Erase operation requires the inclusion of a six-byte load sequence. The SST49LF008A device is
shipped with the Software Data Protection permanently enabled. See Table 9 for the specific software
command codes. During SDP command sequence, invalid commands will abort the device to Read
mode, within T
RC.
Table 8: Operation Modes Selection (PP Mode)
Mode RST# OE# WE# DQ Address
Read
V
IH
V
IL
V
IH
D
OUT
A
IN
Program
V
IH
V
IH
V
IL
D
IN
A
IN
Erase
V
IH
V
IH
V
IL
X
1
Sector or Block address, XXH for Chip-
Erase
Reset V
IL
X X High Z X
Write Inhibit
V
IH
V
IL
X High Z/D
OUT
X
X
XV
IH
High Z/D
OUT
X
Product Identification
V
IH
V
IL
V
IH
Manufacturer’s ID (BFH)
Device ID
2
A
18
-A
1
=V
IL
,A
0
=V
IL
A
18
-A
1
=V
IL
,A
0
=V
IH
T8.6 25085
1. X can be V
IL
or V
IH
, but no other value.
2. Device ID = 5AH for SST49LF008A