Datasheet

Data Sheet
32 Mbit Multi-Purpose Flash Plus
SST39VF3201B / SST39VF3202B
7
©2009 Silicon Storage Technology, Inc. S71384-01-000 1/09
FIGURE 3: pin assignments for 48-ball TFBGA
TABLE 4: Pin Description
Symbol Pin Name Functions
A
MS
1
-A
0
1. A
MS
= Most significant address
A
MS
= A
20
for SST39VF320xB
Address Inputs To provide memory addresses.
During Sector-Erase A
MS
-A
11
address lines will select the sector.
During Block-Erase A
MS
-A
15
address lines will select the block.
DQ
15
-DQ
0
Data Input/output To output data during Read cycles and receive input data during Write cycles.
Data is internally latched during a Write cycle.
The outputs are in tri-state when OE# or CE# is high.
WP# Write Protect To protect the top/bottom boot block from Erase/Program operation when grounded.
RST# Reset To reset and return the device to Read mode.
CE# Chip Enable To activate the device when CE# is low.
OE# Output Enable To gate the data output buffers.
WE# Write Enable To control the Write operations.
V
DD
Power Supply To provide power supply voltage: 2.7-3.6V
V
SS
Ground
NC No Connection Unconnected pins.
T4.0 1384
1384 4-tfbga B1K P2.0
A B C D E F G H
6
5
4
3
2
1
TOP VIEW (balls facing down)
A13
A9
WE#
NC
A7
A3
A12
A8
RST#
WP#
A17
A4
A14
A10
NC
A18
A6
A2
A15
A11
A19
A20
A5
A1
A16
DQ7
DQ5
DQ2
DQ0
A0
NC
DQ14
DQ12
DQ10
DQ8
CE#
DQ15
DQ13
V
DD
DQ11
DQ9
OE#
V
SS
DQ6
DQ4
DQ3
DQ1
V
SS