Datasheet

Data Sheet
16 Mbit Multi-Purpose Flash Plus
SST39VF1601C / SST39VF1602C
23
©2010 Silicon Storage Technology, Inc. S71380-04-000 05/10
FIGURE 18: RST# Timing Diagram (When no internal operation is in progress)
FIGURE 19: RST# Timing Diagram (During Program or Erase operation)
FIGURE 20: AC Input/Output Reference Waveforms
1380 F29.0
RY/BY#
0V
RST#
CE#/OE#
T
RP
T
RHR
1380 F30.0
RY/BY#
CE#
OE#
T
RP
T
RY
T
BR
RST#
1380F14.0
REFERENCE POINTS OUTPUTINPUT
V
IT
V
IHT
V
ILT
V
OT
AC test inputs are driven at V
IHT
(0.9 V
DD
) for a logic ‘1’ and V
ILT
(0.1 V
DD
) for a logic ‘0’. Measurement reference points
for inputs and outputs are V
IT
(0.5 V
DD
) and V
OT
(0.5 V
DD
). Input rise and fall times (10% ↔ 90%) are <5 ns.
Note: V
IT
- V
INPUT
Test
V
OT
- V
OUTPUT
Test
V
IHT
- V
INPUT
HIGH Test
V
ILT
- V
INPUT
LOW Test