Datasheet

Data Sheet
16 Mbit Multi-Purpose Flash Plus
SST39VF1601C / SST39VF1602C
17
©2010 Silicon Storage Technology, Inc. S71380-04-000 05/10
FIGURE 8: CE# Controlled Program Cycle Timing Diagram
FIGURE 9: Data# Polling Timing Diagram
1380 F26.0
ADDRESSES
DQ
15-0
CE#
555 2AA 555 ADDR
XXAA XX55 XXA0 DATA
WORD
(ADDR/DATA)
OE#
WE#
RY/BY#
VALID
T
DH
T
CPH
T
AS
T
CH
T
CS
T
AH
T
CP
T
DS
T
BY
T
BR
T
BP
Note: WP# must be held in proper logic state (V
IL
or V
IH
) 1µs prior to and 1µs after the command sequence.
X can be V
IL
or V
IH
, but no other value.
1380 F27.0
ADDRESS A
19-0
DQ
7
DATA
WE#
OE#
CE#
RY/BY#
DATA# DATA# DATA
T
OES
T
OEH
T
BY
T
CE
T
OE