Datasheet

©2011 Silicon Storage Technology, Inc. DS25028A 08/11
24
16 Mbit / 32 Mbit Multi-Purpose Flash Plus
SST39VF1601 / SST39VF3201
SST39VF1602 / SST39VF3202
Not Recommended for New Designs
A
Microchip Technology Company
Figure 16:RST# Timing Diagram (When no internal operation is in progress)
Figure 17:RST# Timing Diagram (During Program or Erase operation)
Figure 18:AC Input/Output Reference Waveforms
Figure 19:A Test Load Example
1223 F22.1
RST#
CE#/OE#
T
RP
T
RHR
1223 F23.0
RST#
CE#/OE#
T
RP
T
RY
End-of-Write Detection
(Toggle-Bit)
1223 F14.0
REFERENCE POINTS OUTPUTINPUT
V
IT
V
IHT
V
ILT
V
OT
AC test inputs are driven at V
IHT
(0.9 V
DD
) for a logic “1” and V
ILT
(0.1 V
DD
) for a
logic “0”. Measurement reference points for inputs and outputs are V
IT
(0.5 V
DD
) and V
OT
(0.5
V
DD
). Input rise and fall times (10%  90%) are <5 ns.
Note: V
IT
-V
INPUT
Test
V
OT
-V
OUTPUT
Test
V
IHT
-V
INPUT
HIGH Test
V
ILT
-V
INPUT
LOW Test
1223 F15.0
TO TESTER
TO DUT
C
L