Datasheet

©2013 Silicon Storage Technology, Inc. DS25022B 04/13
16
1 Mbit / 2 Mbit / 4 Mbit Multi-Purpose Flash
SST39SF010A / SST39SF020A / SST39SF040
Data Sheet
Figure 9: Toggle Bit Timing Diagram
Figure 10:WE# Controlled Sector-Erase Timing Diagram
1147 F07.1
ADDRESS A
MS-0
DQ
6
WE#
OE#
CE#
T
OE
T
OEH
T
CE
T
OES
TWO READ CYCLES
WITH SAME OUTPUTS
Note
Note: Toggled bit output is always high first.
A
MS
= Most significant address
A
MS
= A
16
for SST39SF010A, A
17
for SST39SF020A, and A
18
for SST39SF040
1147 F08.1
ADDRESS A
MS-0
DQ
7-0
WE#
SW0 SW1 SW2 SW3 SW4 SW5
5555 2AAA 2AAA5555 5555
55 3055AA 80 AA
SA
X
OE#
CE#
SIX-BYTE CODE FOR SECTOR-ERASE
T
SE
T
WP
Note: This device also supports CE# controlled Sector-Erase operation. The WE# and CE# signals are interchangeable
as long as minimum timings are met. (See Table 10)
SA
X
X
= Sector Address
Toggled bit output is always high first.
A
MS
= Most significant address
A
MS
= A
16
for SST39SF010A, A
17
for SST39SF020A, and A
18
for SST39SF040