Datasheet
©2011 Silicon Storage Technology, Inc. DS-25015A 04/11
18
64 Mbit (x16) Advanced Multi-Purpose Flash Plus
SST38VF6401 / SST38VF6402 / SST38VF6403 / SST38VF6404
Data Sheet
A
Microchip Technology Company
Protection Settings Register (PSR)
The Protection Settings Register (PSR) is a user-programmable register that allows for further custom-
ization of the SST38VF6401/6402/6403/6404 protection features. The 16-bit PSR provides four One
Time Programmable (OTP) bits for users, each of which can be programmed individually. However,
once an OTP bit is programmed to ‘0’, the value cannot be changed back to a ‘1’. The other 12 bits of
the PSR are reserved. See Table 8 for the definition of all 16-bits of the PSR.
Note that DQ
4
,DQ
2
,DQ
1
,DQ
0
do not have to be programmed at the same time. In addition, DQ2 and
DQ1 cannot both be programmed to ‘0’. The valid combinations of states of DQ
2
and DQ
1
are shown in
Table 9.
The PSR can be accessed by issuing the PSR Entry command. Users can then use the PSR Program
and PSR Read commands. The PSR Exit command must be issued to leave this mode. See Table 11
for further details.
Table 8: PSR Bit Definitions
Bit Default from Factory Definition
DQ
15
-DQ
5
FFFh Reserved
DQ
4
1 VPB power-up / hardware reset state
0 = all protected
1 = all unprotected
DQ
3
1 Reserved
DQ
2
1 Password mode
0 = Password only mode
1 = Pass-Through mode
DQ
1
1 Pass-Through mode
0 = Pass-Through only mode
1 = Pass-Through mode
DQ
0
1 SEC ID Lock Out Bit
0 = locked
1 = unlocked
T8.0 25015
Table 9: Valid DQ
2
and DQ
1
Combinations
Combination Definition
DQ
2
,DQ
1
= 11 Pass-Through mode (factory default)
DQ
2,
DQ
1
= 10 Pass-Through only mode
DQ
2
,DQ
1
= 01 Password only mode
DQ
2
,DQ
1
= 00 Not Allowed
T9.0 25015