Datasheet

A
Microchip Technology Company
©2011 Silicon Storage Technology, Inc. DS-25015A 04/11
Data Sheet
www.microchip.com
64 Mbit (x16) Advanced Multi-Purpose Flash Plus
SST38VF6401 / SST38VF6402 / SST38VF6403 / SST38VF6404
Features
Organized as 4M x16
Single Voltage Read and Write Operations
2.7-3.6V
Superior Reliability
Endurance: 100,000 Cycles minimum
Greater than 100 years Data Retention3
Low Power Consumption (typical values at 5 MHz)
Active Current: 4 mA (typical)
Standby Current: 3 µA (typical)
Auto Low Power Mode: 3 µA (typical)
128-bit Unique ID
Security-ID Feature
256 Word, user One-Time-Programmable
Protection and Security Features
Hardware Boot Block Protection/WP# Input Pin, Uni-
form (32 KWord) and Non-Uniform (8 KWord) options
available
User-controlled individual block (32 KWord) protection,
using software only methods
Password protection
Hardware Reset Pin (RST#)
Fast Read and Page Read Access Times:
90 ns Read access time
25 ns Page Read access times
- 4-Word Page Read buffer
Latched Address and Data
Fast Erase Times:
Sector-Erase Time: 18 ms (typical)
Block-Erase Time: 18 ms (typical)
Chip-Erase Time: 40 ms (typical)
Erase-Suspend/-Resume Capabilities
Fast Word and Write-Buffer Programming Times:
Word-Program Time: 7 µs (typical)
Write Buffer Programming Time: 1.75 µs / Word (typical)
- 16-Word Write Buffer
Automatic Write Timing
Internal V
PP
Generation
End-of-Write Detection
Toggle Bits
Data# Polling
RY/BY# Output
CMOS I/O Compatibility
JEDEC Standard
Flash EEPROM Pinouts and command sets
CFI Compliant
Packages Available
48-lead TSOP
48-ball TFBGA
All devices are RoHS compliant
The SST38VF6401/6402/6403/6404 are 4M x16 CMOS Advanced Multi-Purpose
Flash Plus (Advanced MPF+) devices manufactured with SST proprietary, high-
performance CMOS Super- Flash technology. The split-gate cell design and thick-
oxide tunneling injector attain better reliability and manufacturability compared
with alternate approaches. The SST38VF6401/6402/6403/6404 write (Program or
Erase) with a 2.7-3.6V power supply. This device conforms to JEDEC standard
pin assignments for x16 memories.

Summary of content (64 pages)