Datasheet

 2015 Microchip Technology Inc. DS20005119G-page 73
SST26VF064B / SST26VF064BA
5EH
A19:A16
77H
0111b
A23:A20
Erase Resume to Suspend Interval
The device requires this typical amount of time to make progress on the
erase operation before allowing another suspend.
Interval = 500µs
Erase resume to suspend interval =(count+1)*64µs
A23:A20= 7 =0111b
5FH
A30:A24
38H
Suspend in-progress erase max latency
Maximum time required by the flash device to suspend an in-progress
erase and be ready to accept another command which accesses the
flash array.
Max latency = 25µs
Erase max latency =(count+1)*units
units (00b:128ns, 01b:1µs, 10b:8µs, 11b:64µs)
A28:A24= count = 24 = 11000b
A30:A29 = 1µs =01b
A31
Suspend/Resume supported
0:supported
1:not supported
JEDEC Flash Parameter Table: 13
th
DWORD
60H A7:A0 30H Program Resume Instruction
61H A15:A8 B0H Program Suspend Instruction
62H A23:A16 30H Resume Instruction
63H A31:A24 B0H Suspend Instruction
JEDEC Flash Parameter Table: 14
th
DWORD
64H
A1:A0
F7H
Reserved = 11b
A7:A2
Status Register Polling Device Busy
111101b: Use of legacy polling is supported by reading the status register
with 05h instruction and checking WIP bit [0] (0=ready, 1=busy)
65H
A14:A8
FFH
Exit Deep Power-down to next operation delay
A15 Exit Power-down Instruction
66H
A22:A16
FFH Enter Power-down instruction
A23
67H
A30:A24
FFH
Deep Power-down Supported
0:supported
1:not supported
A31
JEDEC Flash Parameter Table: 15
th
DWORD
68H
A3:A0
29H
4-4-4 mode disable sequences
Xxx1b: issue FF instruction
1xxxb: issue the Soft Reset 66/99 sequence.
A7:A4
4-4-4 mode enable sequences
X_xx1xb: issue instruction 38h
TABLE 11-1: SERIAL FLASH DISCOVERABLE PARAMETER (SFDP) (CONTINUED) (8 OF 16)
Address Bit Address Data Comments