Datasheet

2015 Microchip Technology Inc. DS20005119G-page 49
SST26VF064B / SST26VF064BA
FIGURE 8-2: SERIAL INPUT TIMING DIAGRAM
FIGURE 8-3: SERIAL OUTPUT TIMING DIAGRAM
FIGURE 8-4: RESET TIMING DIAGRAM
TABLE 8-2: RESET TIMING PARAMETERS
T
R(i)
Parameter Minimum Maximum Units
T
R(o)
Reset to Read (non-data operation) 20 ns
T
R(p)
Reset Recovery from Program or Suspend 100 µs
T
R(e)
Reset Recovery from Erase 1ms
CE#
SIO[3:0]
SCK
MSB
LSB
T
DS
T
DH
T
CHH
T
CES
T
CEH
T
CHS
T
SCKR
T
SCKF
T
CPH
25119 F70.1
25119 F25.1
CE#
SIO[3:0]
SCK
MSB
T
CLZ
T
V
T
SCKH
T
CHZ
T
OH
T
SCKL
LSB
25119 F14.0
MODE 3
CLK
SIO(3:0)
CE#
MODE 3
C1 C3 C2C0
MODE 0
MODE 3
MODE 0MODE 0
T
CPH
Note: C[1:0] = 66H; C[3:2] = 99H