Datasheet

 2015 Microchip Technology Inc. DS20005119G-page 25
SST26VF064B / SST26VF064BA
5.16 Serial Flash Discoverable
Parameters (SFDP)
The Serial Flash Discoverable Parameters (SFDP)
contain information describing the characteristics of the
device. This allows device-independent, JEDEC ID-
independent, and forward/backward compatible soft-
ware support for all future Serial Flash device families.
See Table 11-1 on page 66 for address and data val-
ues.
Initiate SFDP by executing an 8-bit command, 5AH, fol-
lowed by address bits A[23-0] and a dummy byte. CE#
must remain active low for the duration of the SFDP
cycle. For the SFDP sequence, see Figure 5-18.
FIGURE 5-18: SERIAL FLASH DISCOVERABLE PARAMETERS SEQUENCE
5.17 Sector-Erase
The Sector-Erase instruction clears all bits in the
selected 4 KByte sector to ‘1,’ but it does not change a
protected memory area. Prior to any write operation,
the Write-Enable (WREN) instruction must be exe-
cuted.
To execute a Sector-Erase operation, the host drives
CE# low, then sends the Sector Erase command cycle
(20H) and three address cycles, and then drives CE#
high. Address bits [A
MS
:A
12
] (A
MS
= Most Significant
Address) determine the sector address (SA
X
); the
remaining address bits can be V
IL
or V
IH
. To identify the
completion of the internal, self-timed, Write operation,
poll the BUSY bit in the Status register, or wait T
SE
. See
Figures 5-19 and 5-20 for the Sector-Erase sequence.
FIGURE 5-19: 4 KBYTE SECTOR-ERASE SEQUENCE– SQI MODE
FIGURE 5-20: 4 KBYTE SECTOR-ERASE SEQUENCE (SPI)
25119 F56.0
CE#
SO
SI
SCK
ADD.
012345678
ADD. ADD.5A
HIGH IMPEDANCE
15 16 23 24 31 32 39 40
47 48 55 56 63 64
N+2 N+3 N+4
N
N+1
X
MSB
MODE 0
MODE 3
D
OUT
D
OUT
D
OUT
D
OUT
80
71 72
D
OUT
25119 F07.0
MODE 3 0 1
SCK
SIO(3:0)
CE#
C1 C0
MODE 0
2
A5 A4
MSN
LSN
4
A3 A2
6
A1 A0
Note: MSN = Most Sig-
nificant Nibble, LSN = Least Significant Nibble, C[1:0] = 20H
CE#
SO
SI
SCK
ADD.
012345678
ADD. ADD.
20
HIGH IMPEDANCE
15 16
23
24
31
MODE 0
MODE 3
25119 F57.0
MSBMSB