Datasheet

 2015 Microchip Technology Inc. DS20005119G-page 13
SST26VF064B / SST26VF064BA
5.0 INSTRUCTIONS
Instructions are used to read, write (erase and pro-
gram), and configure the SST26VF064B/064BA. The
complete list of the instructions is provided in Table 5-1.
TABLE 5-1: DEVICE OPERATION INSTRUCTIONS FOR SST26VF064B/064BA
Instruction Description
Command
Cycle
1
Mode
Address
Cycle(s)
2, 3
Dummy
Cycle(s)
3
Data
Cycle(s)
3
Max
Freq
4
SPI SQI
Configuration
NOP No Operation 00H X X 0 0 0
104 MHz/
80 MHz
RSTEN Reset Enable 66H X X 0 0 0
RST
5
Reset Memory 99H X X 0 0 0
EQIO Enable Quad I/O 38HX 0 0 0
RSTQIO
6
Reset Quad I/O FFH X X 0 0 0
RDSR Read Status Register 05H X 0 0 1 to 
X0 11 to 
WRSR Write Status Register 01H X X 0 0 2
RDCR Read Configuration
Register
35H X 0 0 1 to 
X0 11 to 
Read
Read Read Memory 03H X 3 0 1 to  40 MHz
High-
Speed
Read
Read Memory at Higher
Speed
0BH X 3 3 1 to 
104 MHz/
80 MHz
X311 to 
SQOR
7
SPI Quad Output Read 6BH X 3 1 1 to 
SQIOR
8
SPI Quad I/O Read EBH X 3 3 1 to 
SDOR
9
SPI Dual Output Read 3BH X 3 1 1 to 
SDIOR
10
SPI Dual I/O Read BBH X 3 1 1 to 
SB Set Burst Length C0H X X 0 0 1
RBSQI SQI Read Burst with Wrap 0CH X 3 3 n to 
RBSPI
8
SPI Read Burst with Wrap ECH X 3 3 n to 
Identification
JEDEC-ID
JEDEC-ID Read 9FH X 0 0 3 to 
104 MHz/
80 MHz
Quad J-ID Quad I/O J-ID Read AFH X 0 1 3 to 
SFDP Serial Flash Discoverable
Parameters
5AH X 3 1 1 to 
Write
WREN Write Enable 06H X X 0 0 0
104 MHz/
80 MHz
WRDI Write Disable 04H X X 0 0 0
SE
11
Erase 4 KBytes of Memory
Array
20H X X 3 0 0
BE
12
Erase 64, 32 or 8 KBytes of
Memory Array
D8HXX 3 0 0
CE Erase Full Array C7H X X 0 0 0
PP Page Program 02H X X 3 0 1 to 256
SPI Quad
PP
7
SQI Quad Page
Program
32H X 3 0 1 to 256