32 Mbit SPI Serial Flash SST25VF032B A Microchip Technology Company Data Sheet SST 25 series Serial Flash family features a four-wire, SPI-compatible interface that allows for a low pin-count package which occupies less board space and ultimately lowers total system costs. The SST25VF032B devices are enhanced with improved operating frequency which lowers power consumption. SST25VF032B SPI serial flash memories are manufactured with SST's proprietary, high-performance CMOS SuperFlash technology.
32 Mbit SPI Serial Flash SST25VF032B A Microchip Technology Company Data Sheet Product Description The SST 25 series Serial Flash family features a four-wire, SPI-compatible interface that allows for a low pin-count package which occupies less board space and ultimately lowers total system costs. SST25VF032B SPI serial flash memories are manufactured with SST’s proprietary, high-performance CMOS SuperFlash technology.
2 Mbit SPI Serial Flash SST25VF032B A Microchip Technology Company Data Sheet Block Diagram SuperFlash Memory X - Decoder Address Buffers and Latches Y - Decoder I/O Buffers and Data Latches Control Logic Serial Interface CE# SCK SI SO WP# HOLD# 1327 B1.0 Note: In AAI mode, the SO pin can act as a RY/BY# pin when configured as a ready/busy status pin. See “End-ofWrite Detection” on page 12. for details Figure 1: Functional Block Diagram ©2011 Silicon Storage Technology, Inc.
32 Mbit SPI Serial Flash SST25VF032B A Microchip Technology Company Data Sheet Pin Description CE# 1 SO 2 8 VDD 7 HOLD# CE# 1 SO 2 8 VDD 7 HOLD# Top View Top View WP# 3 6 SCK VSS 4 5 SI WP# 3 6 SCK VSS 4 5 SI 1327 8-SOIC P1.0 1327 8-WSON P1.0 Note: In AAI mode, the SO pin can act as a RY/BY# pin when configured as a ready/busy status pin. See “End-ofWrite Detection” on page 12. for details.
32 Mbit SPI Serial Flash SST25VF032B A Microchip Technology Company Data Sheet Memory Organization The SST25VF032B SuperFlash memory array is organized in uniform 4 KByte erasable sectors with 32 KByte overlay blocks and 64 KByte overlay erasable blocks. Device Operation The SST25VF032B is accessed through the SPI (Serial Peripheral Interface) bus compatible protocol.
32 Mbit SPI Serial Flash SST25VF032B A Microchip Technology Company Data Sheet Hold Operation The HOLD# pin is used to pause a serial sequence using the SPI flash memory, but without resetting the clocking sequence. To activate the HOLD# mode, CE# must be in active low state. The HOLD# mode begins when the SCK active low state coincides with the falling edge of the HOLD# signal. The HOLD mode ends when the HOLD# signal’s rising edge coincides with the SCK active low state.
32 Mbit SPI Serial Flash SST25VF032B A Microchip Technology Company Data Sheet Status Register The software status register provides status on whether the flash memory array is available for any Read or Write operation, whether the device is Write enabled, and the state of the Memory Write protection. During an internal Erase or Program operation, the status register may be read only to determine the completion of an operation in progress.
32 Mbit SPI Serial Flash SST25VF032B A Microchip Technology Company Data Sheet Auto Address Increment (AAI) The Auto Address Increment Programming-Status bit provides status on whether the device is in AAI programming mode or Byte-Program mode. The default at power up is Byte-Program mode.
32 Mbit SPI Serial Flash SST25VF032B A Microchip Technology Company Data Sheet Instructions Instructions are used to read, write (Erase and Program), and configure the SST25VF032B. The instruction bus cycles are 8 bits each for commands (Op Code), data, and addresses. The WriteEnable (WREN) instruction must be executed prior any Byte-Program, Auto Address Increment (AAI) programming, Sector-Erase, Block-Erase, Write-Status-Register, or Chip-Erase instructions.
32 Mbit SPI Serial Flash SST25VF032B A Microchip Technology Company Data Sheet Table 5: Device Operation Instructions (Continued) (2 of 2) Op Code Cycle1 Address Dummy Data Maximum Cycle(s)2 Cycle(s) Cycle(s) Frequency Instruction Description EBSY Enable SO as an out- 0111 0000b (70H) put RY/BY# status during AAI programming 0 0 0 80 MHz DBSY Disable SO as RY/BY# 1000 0000b (80H) status during AAI programming 0 0 0 80 MHz T5.0 25071 1. 2. 3. 4. 5. 6.
32 Mbit SPI Serial Flash SST25VF032B A Microchip Technology Company Data Sheet High-Speed-Read (80 MHz) The High-Speed-Read instruction supporting up to 80 MHz Read is initiated by executing an 8-bit command, 0BH, followed by address bits [A23-A0] and a dummy byte. CE# must remain active low for the duration of the High-Speed-Read cycle. See Figure 6 for the High-Speed-Read sequence. Following a dummy cycle, the High-Speed-Read instruction outputs the data starting from the specified address location.
32 Mbit SPI Serial Flash SST25VF032B A Microchip Technology Company Data Sheet Auto Address Increment (AAI) Word-Program The AAI program instruction allows multiple bytes of data to be programmed without re-issuing the next sequential address location. This feature decreases total programming time when multiple bytes or entire memory array is to be programmed. An AAI Word program instruction pointing to a protected memory area will be ignored.
32 Mbit SPI Serial Flash SST25VF032B A Microchip Technology Company Data Sheet CE# MODE 3 SCK 0 1 2 3 4 5 6 7 MODE 0 70 SI MSB HIGH IMPEDANCE SO 1327 F09.0 Figure 8: Enable SO as Hardware RY/BY# During AAI Programming CE# MODE 3 SCK 0 1 2 3 4 5 6 7 MODE 0 80 SI MSB HIGH IMPEDANCE SO 1327 F10.0 Figure 9: Disable SO as Hardware RY/BY# During AAI Programming ©2011 Silicon Storage Technology, Inc.
32 Mbit SPI Serial Flash SST25VF032B A Microchip Technology Company Data Sheet CE# MODE 3 0 0 7 0 7 7 8 15 16 23 24 31 32 39 40 47 0 7 8 15 16 23 SCK MODE 0 SI AD WREN EBSY A A A D0 D1 AD D2 D3 Load AAI command, Address, 2 bytes data SO Check for Flash Busy Status to load next valid1 command CE# cont. 0 7 8 15 16 23 0 7 0 7 0 7 8 15 SCK cont. SI cont. Dn-1 AD WRDI Dn Last 2 Data Bytes DBSY RDSR WRDI followed by DBSY to exit AAI Mode DOUT SO cont.
32 Mbit SPI Serial Flash SST25VF032B A Microchip Technology Company Data Sheet Sector-Erase The Sector-Erase instruction clears all bits in the selected 4 KByte sector to FFH. A Sector-Erase instruction applied to a protected memory area will be ignored. Prior to any Write operation, the WriteEnable (WREN) instruction must be executed. CE# must remain active low for the duration of any command sequence.
32 Mbit SPI Serial Flash SST25VF032B A Microchip Technology Company Data Sheet 32-KByte and 64-KByte Block-Erase The 32-KByte Block-Erase instruction clears all bits in the selected 32 KByte block to FFH. A BlockErase instruction applied to a protected memory area will be ignored. The 64-KByte Block-Erase instruction clears all bits in the selected 64 KByte block to FFH. A Block-Erase instruction applied to a protected memory area will be ignored.
32 Mbit SPI Serial Flash SST25VF032B A Microchip Technology Company Data Sheet Chip-Erase The Chip-Erase instruction clears all bits in the device to FFH. A Chip-Erase instruction will be ignored if any of the memory area is protected. Prior to any Write operation, the Write-Enable (WREN) instruction must be executed. CE# must remain active low for the duration of the Chip-Erase instruction sequence. Initiate the Chip-Erase instruction by executing an 8-bit command, 60H or C7H.
32 Mbit SPI Serial Flash SST25VF032B A Microchip Technology Company Data Sheet Write-Enable (WREN) The Write-Enable (WREN) instruction sets the Write-Enable-Latch bit in the Status Register to ‘1’ allowing Write operations to occur. The WREN instruction must be executed prior to any Write (Program/Erase) operation.
32 Mbit SPI Serial Flash SST25VF032B A Microchip Technology Company Data Sheet Enable-Write-Status-Register (EWSR) The Enable-Write-Status-Register (EWSR) instruction arms the Write-Status-Register (WRSR) instruction and opens the status register for alteration. The Write-Status-Register instruction must be executed immediately after the execution of the Enable-Write-Status-Register instruction.
32 Mbit SPI Serial Flash SST25VF032B A Microchip Technology Company Data Sheet Read-ID (RDID) The Read-ID instruction (RDID) identifies the device as SST25VF032B and manufacturer as SST. The device information can be read from executing an 8-bit command, 90H or ABH, followed by address bits [A23-A0]. Following the Read-ID instruction, the manufacturer’s ID is located in address 00000H and the device ID is located in address 00001H.
32 Mbit SPI Serial Flash SST25VF032B A Microchip Technology Company Data Sheet JEDEC Read-ID The JEDEC Read-ID instruction identifies the device as SST25VF032B and the manufacturer as SST. The device information can be read from executing the 8-bit command, 9FH. Following the JEDEC Read-ID instruction, the 8-bit manufacturer’s ID, BFH, is output from the device. After that, a 24-bit device ID is shifted out on the SO pin. Byte 1, BFH, identifies the manufacturer as SST.
32 Mbit SPI Serial Flash SST25VF032B A Microchip Technology Company Data Sheet Electrical Specifications Absolute Maximum Stress Ratings Applied conditions greater than those listed under “Absolute Maximum Stress Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these conditions or conditions greater than those defined in the operational sections of this data sheet is not implied.
32 Mbit SPI Serial Flash SST25VF032B A Microchip Technology Company Data Sheet Table 11:Capacitance (TA = 25°C, f = 1 MHz, other pins open) Parameter Description COUT1 Output Pin Capacitance 1 Input Capacitance CIN Test Condition Maximum VOUT = 0V 12 pF VIN = 0V 6 pF T11.0 25071 1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
32 Mbit SPI Serial Flash SST25VF032B A Microchip Technology Company Data Sheet Table 13:AC Operating Characteristics 25 MHz Symbol Parameter FCLK1 Serial Clock Frequency Min Max 66 MHz Min 25 80 MHz Max Min 66 Max Units 80 MHz TSCKH Serial Clock High Time 18 6.5 6 ns TSCKL Serial Clock Low Time 18 6.5 6 ns TSCKR2 Serial Clock Rise Time (Slew Rate) 0.1 0.1 0.1 V/ns TSCKF Serial Clock Fall Time (Slew Rate) 0.1 0.1 0.
32 Mbit SPI Serial Flash SST25VF032B A Microchip Technology Company Data Sheet TCPH CE# TCES TCHH TCHS TCEH SCK TDS TDH TSCKR TSCKF LSB MSB SI HIGH-Z HIGH-Z SO 1327 F23.0 Figure 22:Serial Input Timing Diagram CE# TSCKH TSCKL SCK TOH TCLZ SO MSB TCHZ LSB TV SI 1327 F24.0 Figure 23:Serial Output Timing Diagram ©2011 Silicon Storage Technology, Inc.
32 Mbit SPI Serial Flash SST25VF032B A Microchip Technology Company Data Sheet CE# THHH THHS THLS SCK THLH THZ TLZ SO SI HOLD# 1327 F25.0 Figure 24:Hold Timing Diagram ©2011 Silicon Storage Technology, Inc.
32 Mbit SPI Serial Flash SST25VF032B A Microchip Technology Company Data Sheet Power-Up Specifications All functionalities and DC specifications are specified for a VDD ramp rate of greater than 1V per 100 ms (0v - 3.0V in less than 300 ms). See Table 14 and Figure 25 for more information. Table 14:Recommended System Power-up Timings Symbol Parameter Minimum Units TPU-READ1 VDD Min to Read Operation 100 µs VDD Min to Write Operation 100 µs TPU-WRITE 1 T14.0 25071 1.
32 Mbit SPI Serial Flash SST25VF032B A Microchip Technology Company Data Sheet VIHT VHT VHT INPUT REFERENCE POINTS OUTPUT VLT VLT VILT 1327 IORef.0 AC test inputs are driven at VIHT (0.9VDD) for a logic “1” and VILT (0.1VDD) for a logic “0”. Measurement reference points for inputs and outputs are VHT (0.6VDD) and VLT (0.4VDD). Input rise and fall times (10% 90%) are <5 ns.
32 Mbit SPI Serial Flash SST25VF032B A Microchip Technology Company Data Sheet Product Ordering Information SST 25 VF XX XX 032B XXXX - 80 XX - 4I XX - S2AF XXXX Environmental Attribute F1 = non-Pb / non-Sn contact (lead) finish: Nickel plating with Gold top (outer) layer E = non-Pb Package Modifier A = 8 leads or contacts Package Type S2 = SOIC 200 mil body width Q = WSON (5 x 6 mm) Temperature Range I = Industrial = -40°C to +85°C Minimum Endurance 4 = 10,000 cycles2 Operating Frequency 66 = 66 M
32 Mbit SPI Serial Flash SST25VF032B A Microchip Technology Company Data Sheet Packaging Diagrams Pin #1 Identifier TOP VIEW SIDE VIEW 0.50 0.35 5.40 5.15 1.27 BSC 0.25 0.05 5.40 5.15 END VIEW 2.16 1.75 8.10 7.70 0° 0.25 0.19 Note: 1. All linear dimensions are in millimeters (max/min). 2. Coplanarity: 0.1 mm 3. Maximum allowable mold flash is 0.15 mm at the package ends and 0.25 mm between leads. 8° 08-soic-EIAJ-S2A-3 0.80 0.
32 Mbit SPI Serial Flash SST25VF032B A Microchip Technology Company Data Sheet TOP VIEW SIDE VIEW BOTTOM VIEW Pin #1 0.2 Pin #1 Corner 1.27 BSC 5.00 ± 0.10 0.076 4.0 0.48 0.35 3.4 0.70 0.50 0.05 Max 6.00 ± 0.10 0.80 0.70 Note: 1. All linear dimensions are in millimeters (max/min). 2. Untoleranced dimensions (shown with box surround) are nominal target dimensions. 3. The external paddle is electrically connected to the die back-side and possibly to certain VSS leads.
Mbit SPI Serial Flash SST25VF032B A Microchip Technology Company Data Sheet Table 15:Revision History Revision 00 01 02 03 04 A Description • • • • • • • • • • • • • • • • • • • • • • • • Date Initial release of data sheet Changed clock frequency from 50 MHz to 66 MHz globally Revised Table 13 AC Operating Characteristics Revised Product Ordering Information and Valid Combinations on page 29 Revised Figure 10 and Figure 11 Changed IDDR2 from Max 15 mA to Max 20 mA in Table 10 Changed TDH from M
32 Mbit SPI Serial Flash SST25VF032B A Microchip Technology Company Data Sheet ISBN:978-1-61341-665-5 © 2011 Silicon Storage Technology, Inc–a Microchip Technology Company. All rights reserved. SST, Silicon Storage Technology, the SST logo, SuperFlash, MTP, and FlashFlex are registered trademarks of Silicon Storage Technology, Inc. MPF, SQI, Serial Quad I/O, and Z-Scale are trademarks of Silicon Storage Technology, Inc.
