Datasheet

©2011 Silicon Storage Technology, Inc. DS25044A 08/11
23
16 Mbit SPI Serial Flash
SST25VF016B
Data Sheet
A
Microchip Technology Company
Table 10:DC Operating Characteristics
Symbol Parameter
Limits
Test ConditionsMin Max Units
I
DDR
Read Current 10 mA CE#=0.1 V
DD
/0.9 V
DD
@25 MHz, SO=open
I
DDR2
Read Current 15 mA CE#=0.1 V
DD
/0.9 V
DD
@50 MHz, SO=open
I
DDR3
Read Current 20 mA CE#=0.1 V
DD
/0.9 V
DD
@80 MHz, SO=open
I
DDW
Program and Erase Current 30 mA CE#=V
DD
I
SB
Standby Current 20 µA CE#=V
DD
,V
IN
=V
DD
or V
SS
I
LI
Input Leakage Current 1 µA V
IN
=GND to V
DD
,V
DD
=V
DD
Max
I
LO
Output Leakage Current 1 µA V
OUT
=GND to V
DD
,V
DD
=V
DD
Max
V
IL
Input Low Voltage 0.8 V V
DD
=V
DD
Min
V
IH
Input High Voltage 0.7 V
DD
VV
DD
=V
DD
Max
V
OL
Output Low Voltage 0.2 V I
OL
=100 µA, V
DD
=V
DD
Min
V
OL2
Output Low Voltage 0.4 V I
OL
=1.6 mA, V
DD
=V
DD
Min
V
OH
Output High Voltage V
DD
-0.2 V I
OH
=-100 µA, V
DD
=V
DD
Min
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Table 11:Capacitance (T
A
= 25°C, f=1 Mhz, other pins open)
Parameter Description Test Condition Maximum
C
OUT
1
1. This parameter is measured only for initial qualification and after a design or process change that could affect this
parameter.
Output Pin Capacitance V
OUT
=0V 12pF
C
IN
1
Input Capacitance V
IN
=0V 6pF
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Table 12:Reliability Characteristics
Symbol Parameter Minimum Specification Units Test Method
N
END
1
1. This parameter is measured only for initial qualification and after a design or process change that could affect this
parameter.
Endurance 10,000 Cycles JEDEC Standard A117
T
DR
1
Data Retention 100 Years JEDEC Standard A103
I
LTH
1
Latch Up 100 + I
DD
mA JEDEC Standard 78
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