Datasheet

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Microchip Technology Company

Data Sheet

www.microchip.com

Features

• Single Voltage Read and Write Operations

– 2.7-3.6V

• Serial Interface Architecture

– SPI Compatible: Mode 0 and Mode 3

• High Speed Clock Frequency

–Upto80MHz

• Superior Reliability

– Endurance: 100,000 Cycles (typical)

– Greater than 100 years Data Retention

• Low Power Consumption:

– Active Read Current: 10 mA (typical)

– Standby Current: 5 µA (typical)

• Flexible Erase Capability

– Uniform 4 KByte sectors

– Uniform 32 KByte overlay blocks

– Uniform 64 KByte overlay blocks

• Fast Erase and Byte-Program:

– Chip-Erase Time: 35 ms (typical)

– Sector-/Block-Erase Time: 18 ms (typical)

– Byte-Program Time: 7 µs (typical)

• Auto Address Increment (AAI) Programming

– Decrease total chip programming time over Byte-Pro-

gram operations

• End-of-Write Detection

– Software polling the BUSY bit in Status Register

– Busy Status readout on SO pin in AAI Mode

• Hold Pin (HOLD#)

– Suspends a serial sequence to the memory

without deselecting the device

• Write Protection (WP#)

– Enables/Disables the Lock-Down function of the status

• Software Write Protection

– Write protection through Block-Protection bits in status

• Temperature Range

– Commercial: 0°C to +70°C

– Industrial: -40°C to +85°C

• Packages Available

– 8-lead SOIC (200 mils)

– 8-contact WSON (6mm x 5mm)

• All devices are RoHS compliant

16 Mbit SPI Serial Flash

SST25VF016B

SST's 25 series Serial Flash family features a four-wire, SPI-compatible interface

that allows for a low pin-count package which occupies less board space and ulti-

mately lowers total system costs. The SST25VF016B devices are enhanced with

improved operating frequency and lower power consumption. SST25VF016B SPI

serial flash memories are manufactured with SST's proprietary, high-performance

CMOS SuperFlash technology. The split-gate cell design and thick-oxide tunnel-

ing injector attain better reliability and manufacturability compared with alternate

approaches.

Summary of content (32 pages)

PAGE 1
6 Mbit SPI Serial Flash SST25VF016B A Microchip Technology Company Data Sheet SST's 25 series Serial Flash family features a four-wire, SPI-compatible interface that allows for a low pin-count package which occupies less board space and ultimately lowers total system costs. The SST25VF016B devices are enhanced with improved operating frequency and lower power consumption. SST25VF016B SPI serial flash memories are manufactured with SST's proprietary, high-performance CMOS SuperFlash technology.
PAGE 2
16 Mbit SPI Serial Flash SST25VF016B A Microchip Technology Company Data Sheet Product Description SST’s 25 series Serial Flash family features a four-wire, SPI-compatible interface that allows for a low pin-count package which occupies less board space and ultimately lowers total system costs. The SST25VF016B devices are enhanced with improved operating frequency and even lower power consumption than the original SST25VFxxxA devices.
PAGE 3
16 Mbit SPI Serial Flash SST25VF016B A Microchip Technology Company Data Sheet Block Diagram SuperFlash Memory X - Decoder Address Buffers and Latches Y - Decoder I/O Buffers and Data Latches Control Logic Serial Interface CE# SCK SI SO WP# HOLD# 1271 B1.0 Figure 1: Functional Block Diagram ©2011 Silicon Storage Technology, Inc.
PAGE 4
16 Mbit SPI Serial Flash SST25VF016B A Microchip Technology Company Data Sheet Pin Description CE# 1 8 VDD SO 2 7 HOLD# CE# 1 SO 2 8 VDD 7 HOLD# Top View Top View WP# 3 6 SCK WP# 3 6 SCK VSS 4 5 SI VSS 4 5 SI 1271 08-wson QA P2.0 1271 08-soic S2A P1.0 8-Lead SOIC 8-Contact WSON Figure 2: Pin Assignments Table 1: Pin Description Symbol Pin Name Functions SCK Serial Clock To provide the timing of the serial interface.
PAGE 5
16 Mbit SPI Serial Flash SST25VF016B A Microchip Technology Company Data Sheet Memory Organization The SST25VF016B SuperFlash memory array is organized in uniform 4 KByte erasable sectors with 32 KByte overlay blocks and 64 KByte overlay erasable blocks. Device Operation The SST25VF016B is accessed through the SPI (Serial Peripheral Interface) bus compatible protocol.
PAGE 6
16 Mbit SPI Serial Flash SST25VF016B A Microchip Technology Company Data Sheet Hold Operation The HOLD# pin is used to pause a serial sequence underway with the SPI flash memory without resetting the clocking sequence. To activate the HOLD# mode, CE# must be in active low state. The HOLD# mode begins when the SCK active low state coincides with the falling edge of the HOLD# signal. The HOLD mode ends when the HOLD# signal’s rising edge coincides with the SCK active low state.
PAGE 7
16 Mbit SPI Serial Flash SST25VF016B A Microchip Technology Company Data Sheet Status Register The software status register provides status on whether the flash memory array is available for any Read or Write operation, whether the device is Write enabled, and the state of the Memory Write protection. During an internal Erase or Program operation, the status register may be read only to determine the completion of an operation in progress.
PAGE 8
16 Mbit SPI Serial Flash SST25VF016B A Microchip Technology Company Data Sheet Auto Address Increment (AAI) The Auto Address Increment Programming-Status bit provides status on whether the device is in Auto Address Increment (AAI) programming mode or Byte-Program mode. The default at power up is ByteProgram mode.
PAGE 9
16 Mbit SPI Serial Flash SST25VF016B A Microchip Technology Company Data Sheet Instructions Instructions are used to read, write (Erase and Program), and configure the SST25VF016B. The instruction bus cycles are 8 bits each for commands (Op Code), data, and addresses. Prior to executing any Byte-Program, Auto Address Increment (AAI) programming, Sector-Erase, Block-Erase, WriteStatus-Register, or Chip-Erase instructions, the Write-Enable (WREN) instruction must be executed first.
PAGE 10
16 Mbit SPI Serial Flash SST25VF016B A Microchip Technology Company Data Sheet 2. 3. 4. 5. 6. Address bits above the most significant bit of each density can be VIL or VIH. 4KByte Sector Erase addresses: use AMS-A12, remaining addresses are don’t care but must be set either at VIL or VIH. 32KByte Block Erase addresses: use AMS-A15, remaining addresses are don’t care but must be set either at VIL or VIH.
PAGE 11
16 Mbit SPI Serial Flash SST25VF016B A Microchip Technology Company Data Sheet High-Speed-Read (80 MHz) The High-Speed-Read instruction supporting up to 80 MHz Read is initiated by executing an 8-bit command, 0BH, followed by address bits [A23-A0] and a dummy byte. CE# must remain active low for the duration of the High-Speed-Read cycle. See Figure 6 for the High-Speed-Read sequence. Following a dummy cycle, the High-Speed-Read instruction outputs the data starting from the specified address location.
PAGE 12
16 Mbit SPI Serial Flash SST25VF016B A Microchip Technology Company Data Sheet Auto Address Increment (AAI) Word-Program The AAI program instruction allows multiple bytes of data to be programmed without re-issuing the next sequential address location. This feature decreases total programming time when multiple bytes or entire memory array is to be programmed. An AAI Word program instruction pointing to a protected memory area will be ignored.
PAGE 13
16 Mbit SPI Serial Flash SST25VF016B A Microchip Technology Company Data Sheet CE# MODE 3 SCK 0 1 2 3 4 5 6 7 MODE 0 70 SI MSB HIGH IMPEDANCE SO 1271 EnableSO.0 Figure 8: Enable SO as Hardware RY/BY# During AAI Programming CE# MODE 3 SCK 0 1 2 3 4 5 6 7 MODE 0 80 SI MSB HIGH IMPEDANCE SO 1271 DisableSO.0 Figure 9: Disable SO as Hardware RY/BY# During AAI Programming ©2011 Silicon Storage Technology, Inc.
PAGE 14
16 Mbit SPI Serial Flash SST25VF016B A Microchip Technology Company Data Sheet CE# MODE 3 0 0 7 0 7 7 8 15 16 23 24 31 32 39 40 47 0 7 8 15 16 23 SCK MODE 0 SI AD WREN EBSY A A A D0 D1 AD D2 D3 Load AAI command, Address, 2 bytes data SO Check for Flash Busy Status to load next valid1 command CE# cont. 0 7 8 15 16 23 0 7 0 7 0 7 8 15 SCK cont. Dn-1 AD SI cont. WRDI Dn Last 2 Data Bytes RDSR DBSY WRDI followed by DBSY to exit AAI Mode DOUT SO cont.
PAGE 15
16 Mbit SPI Serial Flash SST25VF016B A Microchip Technology Company Data Sheet 4-KByte Sector-Erase The Sector-Erase instruction clears all bits in the selected 4 KByte sector to FFH. A Sector-Erase instruction applied to a protected memory area will be ignored. Prior to any Write operation, the WriteEnable (WREN) instruction must be executed. CE# must remain active low for the duration of any command sequence.
PAGE 16
Mbit SPI Serial Flash SST25VF016B A Microchip Technology Company Data Sheet 32-KByte and 64-KByte Block-Erase The 32-KByte Block-Erase instruction clears all bits in the selected 32 KByte block to FFH. A BlockErase instruction applied to a protected memory area will be ignored. The 64-KByte Block-Erase instruction clears all bits in the selected 64 KByte block to FFH. A Block-Erase instruction applied to a protected memory area will be ignored.
PAGE 17
16 Mbit SPI Serial Flash SST25VF016B A Microchip Technology Company Data Sheet Chip-Erase The Chip-Erase instruction clears all bits in the device to FFH. A Chip-Erase instruction will be ignored if any of the memory area is protected. Prior to any Write operation, the Write-Enable (WREN) instruction must be executed. CE# must remain active low for the duration of the Chip-Erase instruction sequence. The Chip-Erase instruction is initiated by executing an 8-bit command, 60H or C7H.
PAGE 18
16 Mbit SPI Serial Flash SST25VF016B A Microchip Technology Company Data Sheet Write-Enable (WREN) The Write-Enable (WREN) instruction sets the Write-Enable-Latch bit in the Status Register to 1 allowing Write operations to occur. The WREN instruction must be executed prior to any Write (Program/ Erase) operation.
PAGE 19
16 Mbit SPI Serial Flash SST25VF016B A Microchip Technology Company Data Sheet Enable-Write-Status-Register (EWSR) The Enable-Write-Status-Register (EWSR) instruction arms the Write-Status-Register (WRSR) instruction and opens the status register for alteration. The Write-Status-Register instruction must be executed immediately after the execution of the Enable-Write-Status-Register instruction.
PAGE 20
16 Mbit SPI Serial Flash SST25VF016B A Microchip Technology Company Data Sheet JEDEC Read-ID The JEDEC Read-ID instruction identifies the device as SST25VF016B and the manufacturer as SST. The device information can be read from executing the 8-bit command, 9FH. Following the JEDEC Read-ID instruction, the 8-bit manufacturer’s ID, BFH, is output from the device. After that, a 16-bit device ID is shifted out on the SO pin. Byte 1, BFH, identifies the manufacturer as SST.
PAGE 21
16 Mbit SPI Serial Flash SST25VF016B A Microchip Technology Company Data Sheet Read-ID (RDID) The Read-ID instruction (RDID) identifies the devices as SST25VF016B and manufacturer as SST. This command is backward compatible to all SST25xFxxxA devices and should be used as default device identification when multiple versions of SPI Serial Flash devices are used in a design. The device information can be read from executing an 8-bit command, 90H or ABH, followed by address bits [A23-A0].
PAGE 22
16 Mbit SPI Serial Flash SST25VF016B A Microchip Technology Company Data Sheet Electrical Specifications Absolute Maximum Stress Ratings (Applied conditions greater than those listed under “Absolute Maximum Stress Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these conditions or conditions greater than those defined in the operational sections of this data sheet is not implied.
PAGE 23
16 Mbit SPI Serial Flash SST25VF016B A Microchip Technology Company Data Sheet Table 10:DC Operating Characteristics Limits Symbol Parameter Min Max Units Test Conditions IDDR Read Current 10 mA CE#=0.1 VDD/0.9 VDD@25 MHz, SO=open IDDR2 Read Current 15 mA CE#=0.1 VDD/0.9 VDD@50 MHz, SO=open IDDR3 Read Current 20 mA CE#=0.1 VDD/0.
PAGE 24
16 Mbit SPI Serial Flash SST25VF016B A Microchip Technology Company Data Sheet Table 13:AC Operating Characteristics 25 MHz Symbol Parameter Min Max 50 MHz Min Max 80 MHz Min Max Units 80 MHz FCLK1 Serial Clock Frequency TSCKH Serial Clock High Time 18 9 6 ns TSCKL Serial Clock Low Time 18 9 6 ns 2 25 50 Serial Clock Rise Time (Slew Rate) 0.1 0.1 0.1 V/ns TSCKF Serial Clock Fall Time (Slew Rate) 0.1 0.1 0.
PAGE 25
16 Mbit SPI Serial Flash SST25VF016B A Microchip Technology Company Data Sheet TCPH CE# TCHH TCES TCEH TSCKF TCHS SCK TDS SI SO TDH TSCKR MSB LSB HIGH-Z HIGH-Z 1271 SerIn.0 Figure 22:Serial Input Timing Diagram CE# TSCKH TSCKL SCK TOH TCLZ SO MSB TCHZ LSB TV SI 1271 SerOut.0 Figure 23:Serial Output Timing Diagram ©2011 Silicon Storage Technology, Inc.
PAGE 26
16 Mbit SPI Serial Flash SST25VF016B A Microchip Technology Company Data Sheet CE# THHH THLS THHS SCK THLH THZ TLZ SO SI HOLD# 1271 Hold.0 Figure 24:Hold Timing Diagram ©2011 Silicon Storage Technology, Inc.
PAGE 27
16 Mbit SPI Serial Flash SST25VF016B A Microchip Technology Company Data Sheet Power-Up Specifications All functionalities and DC specifications are specified for a VDD ramp rate of greater than 1V per 100 ms (0v - 3.0V in less than 300 ms). See Table 14 and Figure 25 for more information. Table 14:Recommended System Power-up Timings Symbol Parameter Minimum Units TPU-READ1 VDD Min to Read Operation 100 µs VDD Min to Write Operation 100 µs TPU-WRITE 1 T14.0 25044 1.
PAGE 28
16 Mbit SPI Serial Flash SST25VF016B A Microchip Technology Company Data Sheet VIHT VHT VHT INPUT REFERENCE POINTS OUTPUT VLT VLT VILT 1271 IORef.0 AC test inputs are driven at VIHT (0.9VDD) for a logic “1” and VILT (0.1VDD) for a logic “0”. Measurement reference points for inputs and outputs are VHT (0.6VDD) and VLT (0.4VDD). Input rise and fall times (10%  90%) are <5 ns.
PAGE 29
16 Mbit SPI Serial Flash SST25VF016B A Microchip Technology Company Data Sheet Product Ordering Information SST 25 VF XX XX 016B XXXX - 50 XX - 4C XX - S2AF XXXX Environmental Attribute F1 = non-Pb / non-Sn contact (lead) finish: Nickel plating with Gold top (outer) layer Package Modifier A = 8 leads or contacts Package Type S2 = SOIC 200 mil body width Q = WSON Temperature Range C = Commercial = 0°C to +70°C I = Industrial = -40°C to +85°C Minimum Endurance 4 = 10,000 cycles Operating Frequency 50
PAGE 30
16 Mbit SPI Serial Flash SST25VF016B A Microchip Technology Company Data Sheet Packaging Diagrams Pin #1 Identifier TOP VIEW SIDE VIEW 0.50 0.35 5.40 5.15 1.27 BSC 0.25 0.05 5.40 5.15 END VIEW 2.16 1.75 8.10 7.70 0° 0.25 0.19 Note: 1. All linear dimensions are in millimeters (max/min). 2. Coplanarity: 0.1 mm 3. Maximum allowable mold flash is 0.15 mm at the package ends and 0.25 mm between leads. 8° 08-soic-EIAJ-S2A-3 0.80 0.
PAGE 31
16 Mbit SPI Serial Flash SST25VF016B A Microchip Technology Company Data Sheet TOP VIEW SIDE VIEW BOTTOM VIEW Pin #1 0.2 Pin #1 Corner 1.27 BSC 5.00 0 .10 0.076 4.0 0.48 0.35 3.4 0.70 0.50 0.05 Max 6.00 0.10 0.80 0.70 Note: 1. All linear dimensions are in millimeters (max/min). 2. Untoleranced dimensions (shown with box surround) are nominal target dimensions. 3. The external paddle is electrically connected to the die back-side and possibly to certain VSS leads.
PAGE 32
16 Mbit SPI Serial Flash SST25VF016B A Microchip Technology Company Data Sheet Table 15:Revision History Revision Description 03 • • • • • • 04 • • • • • • 00 01 02 A • • • • • • Date Initial release of data sheet Corrected “JEDEC Read-ID” on page 20 including timing diagram Corrected VHT and VLT values in Figure 26 on page 28 Migrated document to a Data Sheet Updated Surface Mount Solder Reflow Temperature information Edited Clock Frequency speed from 50 MHz to 80 MHz in Features, page 1 Revis