Datasheet
Table Of Contents
- Features
- Product Description
- Block Diagram
- Pin Description
- Product Identification
- Memory Organization
- Device Operation
- Electrical Specifications
- Table 7: Operating Range
- Table 8: AC Conditions of Test
- Table 9: DC Operating Characteristics VDD = 2.7-3.6V
- Table 10: Recommended System Power-up Timings
- Table 11: Capacitance (TA = 25°C, f=1 Mhz, other pins open)
- Table 12: Reliability Characteristics
- Table 13: AC Operating Characteristics VDD = 2.7-3.6V
- Product Ordering Information
- Packaging Diagrams
©2011 Silicon Storage Technology, Inc. S725081A 10/11
14
1 Mbit SPI Serial Flash
SST25VF010A
Data Sheet
A
Microchip Technology Company
Sector-Erase
The Sector-Erase instruction clears all bits in the selected 4 KByte sector to FFH. A Sector-Erase
instruction applied to a protected memory area will be ignored. Prior to any Write operation, the Write-
Enable (WREN) instruction must be executed. CE# must remain active low for the duration of the any
command sequence. The Sector-Erase instruction is initiated by executing an 8-bit command, 20H, fol-
lowed by address bits [A
23
-A
0
]. Address bits [A
MS
-A
12
](A
MS
= Most Significant address) are used to
determine the sector address (SA
X
), remaining address bits can be V
IL
or V
IH.
CE# must be driven high
before the instruction is executed. The user may poll the Busy bit in the software status register or wait
T
SE
for the completion of the internal self-timed Sector-Erase cycle. See Figure 8 for the Sector-Erase
sequence.
Figure 8: Sector-Erase Sequence
Block-Erase
The Block-Erase instruction clears all bits in the selected 32 KByte block to FFH. A Block-Erase
instruction applied to a protected memory area will be ignored. Prior to any Write operation, the Write-
Enable (WREN) instruction must be executed. CE# must remain active low for the duration of any com-
mand sequence. The Block-Erase instruction is initiated by executing an 8-bit command, 52H or D8H,
followed by address bits [A
23
-A
0
]. Address bits [A
MS
-A
15
](A
MS
= Most significant address) are used to
determine block address (BA
X
), remaining address bits can be V
IL
or V
IH
. CE# must be driven high before
the instruction is executed. The user may poll the Busy bit in the software status register or wait T
BE
for the
completion of the internal self-timed Block-Erase cycle. See Figure 9 for the Block-Erase sequence.
Figure 9: Block-Erase Sequence
CE#
SO
SI
SCK
ADD.
012345678
ADD. ADD.
20
HIGH IMPEDANCE
15 16
23
24
31
MODE 0
MODE 3
1265 F08.0
MSBMSB
CE#
SO
SI
SCK
ADD.
012345678
ADD. ADD.
52 or D8
HIGH IMPEDANCE
15 16
23
24
31
MODE 0
MODE 3
1265 F09.0
MSB MSB