Datasheet

8 Digital Potentiometer Design Guide
SPI Interface
This is also an easy to implement interface, that requires
three or four I/O pins. The additional pins allow data to be
read back from the device or to allow device daisy chaining.
Daisy chaining allows the SPI interface to update all devices
in that chain at the same time.
Many microcontrollers offer this interface as a hardware
module, further simplifying the code development.
High voltage commands require the CS pin forced to the
V
IHH voltage, instead of the VIL voltage. In this state, the
WiperLock Technology bit can be enabled and disabled.
Controller to Single Peripheral
Controller to Multiple Peripherals (Multiple Chip Selects)
Digital Potentiometer Solutions
Controller to Single Peripheral with Multiplexed SDI and SDO Pins