Datasheet

10 Digital Potentiometer Design Guide
Digital Potentiometer Solutions
I
2
C™ Interface
The I
2
C interface is a two wire interface, where the output
drivers are open drain. This protocol supports reads and
writes using only the interface’s two wires. The I
2
C protocol
allows multiple devices on the I
2
C bus, where each device
has a unique device address. The I
2
C protocol requires more
host controller firmware overhead than the SPI protocol, but
requires less hardware resources (2 pins vs. 3 or 4 pins).
The I
2
C protocol allows many devices on the I
2
C bus without
the need to increase the number of I/O pins dedicated by the
master controller. The typical I
2
C interface is shown. Several
of the Microchip digital potentiometer devices support high
voltage commands. This function requires an additional host
controller output pin.
Many microcontrollers offer this interface as a dedicated
hardware module, which eases the software requirement of
the protocol.
High voltage commands require the HVC/A0 pin forced to
the VIHH voltage, instead of the VIL voltage. In this state, the
WiperLock Technology bit can be enabled and disabled.
Controller to Single Peripheral
Controller to Multiple Peripherals (Multiple Chip Selects)