User's Manual
Table Of Contents
- Features:
- Applications:
- RN52 Block Diagram:
- 1.0 Device Overview
- 2.0 Applications
- 3.0 Regulatory Approval
- 4.0 Ordering Information
- 5.0 Document Revision History
www.rovingnetworks.com Version 1.1 3/19/13 page 8
Advanced Information
RN52-DS
1.1.2 ANALOG-TO-DIGITAL CONVERTER
(ADC)
The ADC consists of two second-order sigma delta
(SD) converters, resulting in two separate channels
with identical functionality. Each ADC supports the fol-
lowing sample rates:
• 8 kHz
• 11.025 kHz
• 16 kHz
• 22.05 kHz
• 24 kHz
• 32 kHz
• 44.1 kHz
The ADC analog amplifier is a two-stage amplifier. The
first stage selects the correct gain for either micro-
phone or line input. See Figure 1-6.
FIGURE 1-6: ADC ANALOG AMPLIFIER BLOCK DIAGRAM
1.1.3 DIGITAL-TO-ANALOG CONVERTER
(DAC)
The DAC consists of two third-order SD converters,
resulting in two separate channels with identical func-
tionality. Each DAC supports the following sample
rates:
• 8 kHz
• 11.025 kHz
• 16 kHz
• 22.05 kHz
• 24 kHz
• 32 kHz
• 44.1 kHz
1.1.4 MICROPHONE INPUT
The RN52 audio input is intended for use from 1 μA at
94 dB SPL to about 10 μA at 94 dB SPL, which requires
microphones with sensitivity between –40 and –60
dBV. MIC_BIAS requires a minimum load to maintain
regulation. MIC_BIAS maintains regulation within
0.199 and 1.229 mA. Therefore, if you use a micro-
phone with specifications below these limits, the micro-
phone output must be pre-loaded with a large value
resistor to ground.
–
+
–
+
P
N
Gain 0:7Line Mode/Microphone Mode
Microphone Mode Input Impedance = 6 kΩ
Line Mode Input Impedance = 6 kΩ to 30 kΩ
Bypass or 24-dB Gain -3 to 18 dB Gain
P
N