User's Manual

www.rovingnetworks.com Version 1.1 3/19/13 page 5
Advanced Information
RN52-DS
6 GPIO5 Bidirectional with program-
mable strength internal
pull-up/down.
Programmable I/O. I/O High
7 GPIO12 Bidirectional with program-
mable strength internal
pull-up/down.
Programmable I/O. I/O High
8 GPIO13 Bidirectional with program-
mable strength internal
pull-up/down.
Programmable I/O. I/O High
9 GPIO11 Bidirectional with program-
mable strength internal
pull-up/down.
Programmable I/O. I/O High
10 GPIO10 Bidirectional with program-
mable strength internal
pull-up/down.
Programmable I/O. I/O High
11 GPIO9 Bidirectional with program-
mable strength internal
pull-up/down.
When you drive this signal low, the module’s
UART goes into command mode. If this signal
floats high, the UART is in data mode. Reserved.
Not available for use at runtime.
Input High
12 USBD- Bidirectional. USB data minus. I/O
13 USBD+ Bidirectional. USB data plus with selectable internal 1.5-Kohm
pull-up resistor.
I/O
14 UART_RTS CMOS output, tri-state, with
weak internal pull-up.
UART request to send active low. Output
15 UART_CTS CMOS input with weak
internal pull-down.
UART clear to send active low. Input
16 UART_TX CMOS output, tri-state, with
weak internal pull-up.
UART data output. Output
17 UART_RX CMOS input with weak
internal pull-down.
UART data input. Input
18 GND Ground. Ground.
19 GPIO7 Bidirectional with program-
mable strength internal
pull-up/down.
Driving this pin low sets the UART baud rate to
9,600. By default the pin is high with a baud rate
of 115,200.
I/O High
20 GPIO6 Bidirectional with program-
mable strength internal
pull-up/down.
Programmable I/O. I/O High
21 PWREN Analog. Pull high to power up RN52.
22 VDD 3.3-V power input. 3.3v power input.
23 PCM_IN CMOS input, with weak
internal pull down.
Synchronous data input, configurable for
SPDIF_IN or SD_IN (I
2
S).
Input
24 PCM_OUT CMOS input, with weak
internal pull down.
Synchronous data input, configurable for
SPDIF_OUT or SD_OUT (I
2
S).
Input
25 PCM_SYNC Bidirectional with weak
internal pull down.
Synchronous data sync; WS (I
2
S). I/O
26 PCM_CLK CMOS input, with weak
internal pull down.
Synchronous data clock; SCK (I
2
S). Input
TABLE 1-4: PIN DESCRIPTION (PART 2 OF 3) Note 1
Pin Symbol I/O Type Description Direction Default