Datasheet

PIC32MX5XX/6XX/7XX
DS60001156H-page 40 2009-2013 Microchip Technology Inc.
TMS 23 17 G3 B9 I ST JTAG Test mode select pin
TCK 27 38 J6 A26 I ST JTAG test clock input pin
TDI 28 60 G11 A40 I ST JTAG test data input pin
TDO 24 61 G9 B33 O JTAG test data output pin
RTCC 42 68 E9 B37 O Real-Time Clock alarm output
CV
REF-1528L2
A21
I Analog Comparator Voltage Reference (low)
CVREF+ 16 29 K3 B17 I Analog Comparator Voltage Reference (high)
CV
REFOUT 23 34 L5 A24 O Analog Comparator Voltage Reference output
C1IN- 12 21 H2 B11 I Analog Comparator 1 negative input
C1IN+ 11 20 H1 A12 I Analog Comparator 1 positive input
C1OUT 21 32 K4 A23 O Comparator 1 output
C2IN- 14 23 J2 B13 I Analog Comparator 2 negative input
C2IN+ 13 22 J1 A13 I Analog Comparator 2 positive input
C2OUT 22 33 L4 B19 O Comparator 2 output
PMA0 30 44 L8 A29 I/O TTL/ST
Parallel Master Port Address bit 0 input
(Buffered Slave modes) and output
(Master modes)
PMA1 29 43 K7 B24 I/O TTL/ST
Parallel Master Port Address bit 1 input
(Buffered Slave modes) and output
(Master modes)
PMA2 8 14 F3 A9 O Parallel Master Port address
(Demultiplexed Master modes)
PMA3 6 12 F2 A8 O
PMA4 5 11 F4 B6 O
PMA5 4 10 E3 A7 O
PMA6 16 29 K3 B17 O
PMA7 22 28 L2 A21 O
PMA8 32 50 L11 A32 O
PMA9 31 49 L10 B27 O
PMA10 28 42 L7 A28 O
PMA11 27 41 J7 B23 O
PMA12 24 35 J5 B20 O
PMA13 23 34 L5 A24 O
PMA14 45 71 C11 A46 O
PMA15 44 70 D11 B38 O
PMCS1 45 71 C11 A46 O
Parallel Master Port Chip Select 1
strobe
PMCS2 44 70 D11 B38 O
Parallel Master Port Chip Select 2
strobe
TABLE 1-1: PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number
(1)
Pin
Type
Buffer
Type
Description
64-Pin
QFN/TQFP
100-Pin
TQFP
121-Pin
TFBGA
124-pin
VTLA
Legend: CMOS = CMOS compatible input or output Analog = Analog input P = Power
ST = Schmitt Trigger input with CMOS levels O = Output I = Input
TTL = TTL input buffer
Note 1: Pin numbers are only provided for reference. See the Pin Diagrams section for device pin availability.
2: See Section 24.0 “Ethernet Controller” for more information.