Datasheet

PIC32MX5XX/6XX/7XX
DS60001156H-page 366  2009-2013 Microchip Technology Inc.
TABLE 31-7: DC CHARACTERISTICS: POWER-DOWN CURRENT (IPD)
DC CHARACTERISTICS
Standard Operating Conditions: 2.3V to 3.6V
(unless otherwise stated)
Operating temperature -40°C  T
A  +85°C for Industrial
-40°C  TA  +105°C for V-Temp
Param.
No.
Typical
(2)
Max. Units Conditions
Power-Down Current (I
PD)
(1)
for PIC32MX575/675/695/775/795 Family Devices
DC40 10 40
A
-40°C
2.3V Base Power-Down Current (Note 6)
DC40a 36 100 +25°C
DC40b 400 720 +85°C
DC40h 900 1800 +105°C
DC40c 41 120 +25°C 3.3V Base Power-Down Current
DC40d 22 80 -40°C
3.6V Base Power-Down Current
DC40e 42 120 +25°C
DC40g 315 400
(5)
+70°C
DC40f 410 800 +85°C
DC40i 1000 2000 +105°C
Module Differential Current for PIC32MX575/675/695/775/795 Family Devices
DC41 — 10
A—
2.3V Watchdog Timer Current: I
WDT (Notes 3,6)
DC41a 5 — 3.3V Watchdog Timer Current: I
WDT (Note 3)
DC41b — 20 3.6V Watchdog Timer Current: I
WDT (Note 3)
DC42 — 40
A—
2.3V RTCC + Timer1 w/32 kHz Crystal: IRTCC (Notes 3,6)
DC42a 23 — 3.3V RTCC + Timer1 w/32 kHz Crystal: I
RTCC (Note 3)
DC42b — 50 3.6V RTCC + Timer1 w/32 kHz Crystal: IRTCC (Note 3)
DC43 — 1300
A—
2.5V ADC: I
ADC (Notes 3,4,6)
DC43a 1100 — 3.3V ADC: I
ADC (Notes 3,4)
DC43b — 1300 3.6V ADC: IADC (Notes 3,4)
Note 1: The test conditions for I
PD current measurements are as follows:
• Oscillator mode is EC (for 8 MHz and below) and EC+PLL (for above 8 MHz) with OSC1 driven by
external square wave from rail-to-rail, (OSC1 input clock input over/undershoot < 100 mV required)
• OSC2/CLKO is configured as an I/O input pin
• USB PLL oscillator is disabled if the USB module is implemented, PBCLK divisor = 1:8
• CPU is in Sleep mode, program Flash memory Wait states = 111, Program Cache and Prefetch are
disabled and SRAM data memory Wait states = 1
• No peripheral modules are operating, (ON bit = 0)
• WDT, Clock Switching, Fail-Safe Clock Monitor, and Secondary Oscillator are disabled
• All I/O pins are configured as inputs and pulled to V
SS
•MCLR = VDD
• RTCC and JTAG are disabled
2: Data in the “Typical” column is at 3.3V, 25°C unless otherwise stated. Parameters are for design guidance
only and are not tested.
3: The  current is the additional current consumed when the module is enabled. This current should be
added to the base I
PD current.
4: Test conditions for ADC module differential current are as follows: Internal ADC RC oscillator enabled.
5: Data is characterized at +70°C and not tested. Parameter is for design guidance only.
6: This parameter is characterized, but not tested in manufacturing.