Datasheet

 2009-2013 Microchip Technology Inc. DS60001156H-page 365
PIC32MX5XX/6XX/7XX
Idle Current (IIDLE)
(1)
for PIC32MX534/564/664/764 Family Devices
DC30a 1.5 5
mA
-40ºC, +25ºC, +85ºC
—4 MHz
DC30c 3.5 6 +105ºC
DC31a 7 11 -40ºC, +25ºC, +85ºC — 25 MHz (Note 3)
DC32a 13 20 mA -40ºC, +25ºC, +85ºC — 60 MHz (Note 3)
DC33a 17 25
mA
-40ºC, +25ºC, +85ºC
—80 MHz
DC33c 20 27 +105ºC
DC34c
—
40
µA
-40°C
2.3V
LPRC (31 kHz)
(Note 3)
DC34d 75 +25°C
DC34e 800 +85°C
DC34f 1000 +105ºC
DC35c 30
—µA
-40°C
3.3V
DC35d 55 +25°C
DC35e 230 +85°C
DC35f 800 +105ºC
DC36c
—
43
µA
-40°C
3.6V
DC36d 106 +25°C
DC36e 800 +85°C
DC36f 1000 +105ºC
TABLE 31-6: DC CHARACTERISTICS: IDLE CURRENT (IIDLE) (CONTINUED)
DC CHARACTERISTICS
Standard Operating Conditions: 2.3V to 3.6V
(unless otherwise stated)
Operating temperature -40°C  T
A  +85°C for Industrial
-40°C  T
A  +105°C for V-Temp
Parameter
No.
Typical
(2)
Max. Units Conditions
Note 1: The test conditions for IIDLE current measurements are as follows:
• Oscillator mode is EC (for 8 MHz and below) and EC+PLL (for above 8 MHz) with OSC1 driven by
external square wave from rail-to-rail, (OSC1 input clock input over/undershoot < 100 mV required)
• OSC2/CLKO is configured as an I/O input pin
• USB PLL oscillator is disabled if the USB module is implemented, PBCLK divisor = 1:8
• CPU is in Idle mode, program Flash memory Wait states = 111, Program Cache and Prefetch are dis-
abled and SRAM data memory Wait states = 1
• No peripheral modules are operating, (ON bit = 0)
• WDT, Clock Switching, Fail-Safe Clock Monitor, and Secondary Oscillator are disabled
• All I/O pins are configured as inputs and pulled to V
SS
•MCLR = VDD
• RTCC and JTAG are disabled
2: Data in “Typical” column is at 3.3V, 25°C unless otherwise stated. Parameters are for design guidance only
and are not tested.
3: This parameter is characterized, but not tested in manufacturing.