Datasheet

 2009-2013 Microchip Technology Inc. DS60001156H-page 329
PIC32MX5XX/6XX/7XX
REGISTER 24-39: EMAC1SA2: ETHERNET CONTROLLER MAC STATION ADDRESS 2 REGISTER
Bit
Range
Bit
31/23/15/7
Bit
30/22/14/6
Bit
29/21/13/5
Bit
28/20/12/4
Bit
27/19/11/3
Bit
26/18/10/2
Bit
25/17/9/1
Bit
24/16/8/0
31:24
U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0
— — — — — — — —
23:16
U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0
— — — — — — — —
15:8
R/W-P R/W-P R/W-P R/W-P R/W-P R/W-P R/W-P R/W-P
STNADDR2<7:0>
7:0
R/W-P R/W-P R/W-P R/W-P R/W-P R/W-P R/W-P R/W-P
STNADDR1<7:0>
Legend: P = Programmable bit
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 31-16 Reserved: Maintain as ‘0’; ignore read
bit 15-8 STNADDR2<7:0>: Station Address Octet 2 bits
These bits hold the second transmitted octet of the station address.
bit 7-0 STNADDR1<7:0>: Station Address Octet 1 bits
These bits hold the most significant (first transmitted) octet of the station address.
Note 1: Both 16-bit and 32-bit accesses are allowed to these registers (including the SET, CLR and INV registers).
8-bit accesses are not allowed and are ignored by the hardware.
2: This register is loaded at reset from the factory preprogrammed station address.