Datasheet

PIC32MX5XX/6XX/7XX
DS60001156H-page 318  2009-2013 Microchip Technology Inc.
REGISTER 24-27: EMAC1CLRT: ETHERNET CONTROLLER MAC COLLISION WINDOW/RETRY
LIMIT REGISTER
Bit
Range
Bit
31/23/15/7
Bit
30/22/14/6
Bit
29/21/13/5
Bit
28/20/12/4
Bit
27/19/11/3
Bit
26/18/10/2
Bit
25/17/9/1
Bit
24/16/8/0
31:24
U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0
— — — — — — — —
23:16
U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0
— — — — — — — —
15:8
U-0 U-0 R/W-1 R/W-1 R/W-0 R/W-1 R/W-1 R/W-1
— — CWINDOW<5:0>
7:0
U-0 U-0 U-0 U-0 R/W-1 R/W-1 R/W-1 R/W-1
— — — — RETX<3:0>
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 31-14 Unimplemented: Read as ‘0’
bit 13-8 CWINDOW<5:0>: Collision Window bits
This is a programmable field representing the slot time or collision window during which collisions occur in
properly configured networks. Since the collision window starts at the beginning of transmission, the pre-
amble and SFD is included. Its default of 0x37 (55d) corresponds to the count of frame bytes at the end of
the window.
bit 7-4 Unimplemented: Read as ‘0’
bit 3-0 RETX<3:0>: Retransmission Maximum bits
This is a programmable field specifying the number of retransmission attempts following a collision before
aborting the packet due to excessive collisions. The Standard specifies the maximum number of attempts
(attemptLimit) to be 0xF (15d). Its default is ‘0xF’.
Note: Both 16-bit and 32-bit accesses are allowed to these registers (including the SET, CLR and INV registers).
8-bit accesses are not allowed and are ignored by the hardware.