Datasheet

PIC32MX5XX/6XX/7XX
DS60001156H-page 314  2009-2013 Microchip Technology Inc.
REGISTER 24-24: EMAC1CFG2: ETHERNET CONTROLLER MAC CONFIGURATION 2 REGISTER
Bit
Range
Bit
31/23/15/7
Bit
30/22/14/6
Bit
29/21/13/5
Bit
28/20/12/4
Bit
27/19/11/3
Bit
26/18/10/2
Bit
25/17/9/1
Bit
25/16/8/0
31:24
U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0
— — — — — — — —
23:16
U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0
— — — — — — — —
15:8
U-0 R/W-1 R/W-0 R/W-0 U-0 U-0 R/W-0 R/W-0
—
EXCESS
DFR
BPNOBK
OFF
NOBK
OFF
— — LONGPRE PUREPRE
7:0
R/W-1 R/W-0 R/W-1 R/W-1 R/W-0 R/W-0 R/W-1 R/W-0
AUTO
PAD
(1,2)
VLAN
PAD
(1,2)
PAD
ENABLE
(1,3)
CRC
ENABLE
DELAYCRC HUGEFRM LENGTHCK FULLDPLX
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 31-15 Unimplemented: Read as ‘0’
bit 14 EXCESSDER: Excess Defer bit
1 = The MAC will defer to carrier indefinitely as per the Standard
0 = The MAC will abort when the excessive deferral limit is reached
bit 13 BPNOBKOFF: Backpressure/No Backoff bit
1 = The MAC after incidentally causing a collision during backpressure will immediately retransmit without
backoff reducing the chance of further collisions and ensuring transmit packets get sent
0 = The MAC will not remove the backoff
bit 12 NOBKOFF: No Backoff bit
1 = Following a collision, the MAC will immediately retransmit rather than using the Binary Exponential Back-
off algorithm as specified in the Standard
0 = Following a collision, the MAC will use the Binary Exponential Backoff algorithm
bit 11-10 Unimplemented: Read as ‘0’
bit 9 LONGPRE: Long Preamble Enforcement bit
1 = The MAC only allows receive packets which contain preamble fields less than 12 bytes in length
0 = The MAC allows any length preamble as per the Standard
bit 8 PUREPRE: Pure Preamble Enforcement bit
1 = The MAC will verify the content of the preamble to ensure it contains 0x55 and is error-free. A packet with
errors in its preamble is discarded
0 = The MAC does not perform any preamble checking
bit 7 AUTOPAD: Automatic Detect Pad Enable bit
(1,2)
1 = The MAC will automatically detect the type of frame, either tagged or untagged, by comparing the two
octets following the source address with 0x8100 (VLAN Protocol ID) and pad accordingly
0 = The MAC does not perform automatic detection
Note 1: Table 24-5 provides a description of the pad function based on the configuration of this register.
2: This bit is ignored if the PADENABLE bit is cleared.
3: This bit is used in conjunction with the AUTOPAD and VLANPAD bits.
Note: Both 16-bit and 32-bit accesses are allowed to these registers (including the SET, CLR and INV registers).
8-bit accesses are not allowed and are ignored by the hardware