Datasheet

PIC32MX5XX/6XX/7XX
DS60001156H-page 282  2009-2013 Microchip Technology Inc.
REGISTER 23-18: CiRXFn: CAN ACCEPTANCE FILTER ‘n’ REGISTER 7 (n = 0 THROUGH 31)
Bit
Range
Bit
31/23/15/7
Bit
30/22/14/6
Bit
29/21/13/5
Bit
28/20/12/4
Bit
27/19/11/3
Bit
26/18/10/2
Bit
25/17/9/1
Bit
24/16/8/0
31:24
R/W-x R/W-x R/W-x R/W-x R/W-x R/W-x R/W-x R/W-x
SID<10:3>
23:16
R/W-x R/W-x R/W-x U-0 R/W-0 U-0 R/W-x R/W-x
SID<2:0> —EXID— EID<17:16>
15:8
R/W-x R/W-x R/W-x R/W-x R/W-x R/W-x R/W-x R/W-x
EID<15:8>
7:0
R/W-x R/W-x R/W-x R/W-x R/W-x R/W-x R/W-x R/W-x
EID<7:0>
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
-n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown
bit 31-21 SID<10:0>: Standard Identifier bits
1 = Message address bit SIDx must be ‘1’ to match filter
0 = Message address bit SIDx must be ‘0’ to match filter
bit 20 Unimplemented: Read as ‘0’
bit 19 EXID: Extended Identifier Enable bits
1 = Match only messages with extended identifier addresses
0 = Match only messages with standard identifier addresses
bit 18 Unimplemented: Read as ‘0’
bit 17-0 EID<17:0>: Extended Identifier bits
1 = Message address bit EIDx must be ‘1’ to match filter
0 = Message address bit EIDx must be ‘0’ to match filter
Note: This register can only be modified when the filter is disabled (FLTENn = 0).