Datasheet

PIC32MX5XX/6XX/7XX
DS60001156H-page 250  2009-2013 Microchip Technology Inc.
bit 7-5 SSRC<2:0>: Conversion Trigger Source Select bits
111 = Internal counter ends sampling and starts conversion (auto convert)
110 = Reserved
101 = Reserved
100 = Reserved
011 = CTMU ends sampling and starts conversion
010 = Timer 3 period match ends sampling and starts conversion
001 = Active transition on INT0 pin ends sampling and starts conversion
000 = Clearing the SAMP bit ends sampling and starts conversion
bit 4 CLRASAM: Stop Conversion Sequence bit (when the first ADC interrupt is generated)
1 = Stop conversions when the first ADC interrupt is generated. Hardware clears the ASAM bit when the
ADC interrupt is generated.
0 = Normal operation, buffer contents will be overwritten by the next conversion sequence
bit 3 Unimplemented: Read as ‘0’
bit 2 ASAM: ADC Sample Auto-Start bit
1 = Sampling begins immediately after last conversion completes; SAMP bit is automatically set
0 = Sampling begins when SAMP bit is set
bit 1 SAMP: ADC Sample Enable bit
(2)
1 = The ADC S&H circuit is sampling
0 = The ADC S&H circuit is holding
When ASAM = 0, writing ‘1’ to this bit starts sampling.
When SSRC<2:0> = 000, writing ‘0’ to this bit will end sampling and start conversion.
bit 0 DONE: Analog-to-Digital Conversion Status bit
(3)
Clearing this bit will not affect any operation in progress.
1 = Analog-to-digital conversion is done
0 = Analog-to-digital conversion is not done or has not started
REGISTER 22-1: AD1CON1: ADC CONTROL REGISTER 1 (CONTINUED)
Note 1: When using the 1:1 PBCLK divisor, the user’s software should not read/write the peripheral’s SFRs in the
SYSCLK cycle immediately following the instruction that clears the module’s ON bit.
2: If ASAM = 0, software can write a ‘1’ to start sampling. This bit is automatically set by hardware if
ASAM = 1. If SSRC<2:0> = 000, software can write a ‘0’ to end sampling and start conversion. If
SSRC<2:0>
‘000’, this bit is automatically cleared by hardware to end sampling and start conversion.
3: This bit is automatically set by hardware when analog-to-digital conversion is complete. Software can
write a ‘0’ to clear this bit (a write of ‘1’ is not allowed). Clearing this bit does not affect any operation
already in progress. This bit is automatically cleared by hardware at the start of a new conversion.