Datasheet

2009-2013 Microchip Technology Inc. DS60001156H-page 233
PIC32MX5XX/6XX/7XX
bit 5-2 WAITM<3:0>: Data Read/Write Strobe Wait States bits
(1)
1111 = Wait of 16 TPB
0001 = Wait of 2 T
PB
0000 = Wait of 1 TPB (default)
bit 1-0 WAITE<1:0>: Data Hold After Read/Write Strobe Wait States bits
(1)
11 = Wait of 4 TPB
10 = Wait of 3 TPB
01 = Wait of 2 TPB
00 = Wait of 1 TPB (default)
For Read operations:
11 = Wait of 3 T
PB
10 = Wait of 2 TPB
01 = Wait of 1 TPB
00 = Wait of 0 TPB (default)
REGISTER 20-2: PMMODE: PARALLEL PORT MODE REGISTER (CONTINUED)
Note 1: Whenever WAITM<3:0> = 0000, WAITB and WAITE bits are ignored and forced to 1 TPBCLK cycle for a
write operation; WAITB = 1 TPBCLK cycle, WAITE = 0 TPBCLK cycles for a read operation.
2: Address bit A14 is not subject to auto-increment/decrement if configured as Chip Select CS1.